[PATCH 12/17] drm/i915/dp: Use num_joined_pipes in bigjoiner_bw_max_bpp
Ville Syrjälä
ville.syrjala at linux.intel.com
Fri Sep 27 15:44:28 UTC 2024
On Fri, Sep 27, 2024 at 08:52:36PM +0530, Ankit Nautiyal wrote:
> Streamline the helper to get max compressed bpp for bigjoiner case, to
> effectively use num of pipes joined. This will make the addition of
> ultrajoiner limitations easier and improve redability.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 29f8cb9c4dd0..a85527a55dc0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -864,16 +864,21 @@ static int bigjoiner_interface_bits(struct intel_display *display)
> return DISPLAY_VER(display) >= 14 ? 36 : 24;
> }
>
> -static u32 bigjoiner_bw_max_bpp(struct intel_display *display, u32 mode_clock)
> +static u32 bigjoiner_bw_max_bpp(struct intel_display *display, u32 mode_clock,
> + int num_joined_pipes)
> {
> u32 max_bpp;
> /* With bigjoiner multiple dsc engines are used in parallel so PPC is 2 */
> int ppc = 2;
> + int num_big_joiners = num_joined_pipes / 2;
>
> max_bpp = display->cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits(display) /
> intel_dp_mode_to_fec_clock(mode_clock);
>
> + max_bpp *= num_big_joiners;
> +
> return max_bpp;
> +
> }
>
> static u32 small_joiner_ram_max_bpp(struct intel_display *display,
> @@ -903,7 +908,8 @@ u32 get_max_compressed_bpp_with_joiner(struct drm_i915_private *i915,
> num_joined_pipes);
>
> if (num_joined_pipes == 2) {
> - u32 max_bpp_bigjoiner = bigjoiner_bw_max_bpp(display, mode_clock);
> + u32 max_bpp_bigjoiner = bigjoiner_bw_max_bpp(display, mode_clock,
> + num_joined_pipes);
>
> return min(max_bpp_small_joiner_ram, max_bpp_bigjoiner);
> }
> --
> 2.45.2
--
Ville Syrjälä
Intel
More information about the Intel-gfx
mailing list