[PATCH v2 1/2] drm/i915/dp: Enable SST LT fallback between UHBR and non-UHBR link rates

Imre Deak imre.deak at intel.com
Mon Apr 7 07:04:32 UTC 2025


On Fri, Apr 04, 2025 at 05:34:33PM -0700, Khaled Almahallawy wrote:
> With all the pieces for UHBR SST LT implemented, we can now enable LT
> fallback switching between SST UHBR and non-UHBR link rates.
> 
> [...]
>
> @@ -1303,7 +1233,7 @@ static int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
>  		return 0;
>  	}
>  
> -	if (!reduce_link_params(intel_dp, crtc_state, &new_link_rate, &new_lane_count))
> +	if (!reduce_link_params_in_bw_order(intel_dp, crtc_state, &new_link_rate, &new_lane_count))

On SST - during state computation - a minimum link configuration
required for the mode was selected to beging with. Simply reducing that
link config further in BW order as for MST (which selected the maximum
link config to begin with) doesn't work.

>  		return -1;
>  
>  	if (intel_dp_is_edp(intel_dp) &&
> -- 
> 2.43.0
> 


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