[PATCH v1 2/8] drm/i915/dmc: Add pipe DMC DC balance registers

[Mitul Golani]

Add pipe registers to access pipe DMC DC Balance registers.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dmc_regs.h | 37 +++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
index 1bf446f96a10..5ac409fbbc4e 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
@@ -103,4 +103,41 @@
 #define  DMC_WAKELOCK_CTL_REQ	 REG_BIT(31)
 #define  DMC_WAKELOCK_CTL_ACK	 REG_BIT(15)
 
+#define _PIPEDMC_DCB_CTL_A		0x5f1a0
+#define _PIPEDMC_DCB_CTL_B		0x5f5a0
+#define PIPEDMC_DCB_CTL(pipe)		_MMIO_PIPE((pipe), _PIPEDMC_DCB_CTL_A, _PIPEDMC_DCB_CTL_B)
+#define PIPEDMC_ADAPTIVE_DCB_ENABLE	REG_BIT(31)
+
+#define _PIPEDMC_DCB_VMIN_A		0x5f1a4
+#define _PIPEDMC_DCB_VMIN_B		0x5f5a4
+#define PIPEDMC_DCB_VMIN(pipe)		_MMIO_PIPE((pipe), _PIPEDMC_DCB_VMIN_A, _PIPEDMC_DCB_VMIN_B)
+
+#define _PIPEDMC_DCB_VMAX_A		0x5f1a8
+#define _PIPEDMC_DCB_VMAX_B		0x5f5a8
+#define PIPEDMC_DCB_VMAX(pipe)		_MMIO_PIPE((pipe), _PIPEDMC_DCB_VMAX_A, _PIPEDMC_DCB_VMAX_B)
+
+#define _PIPEDMC_DCB_MAX_INCREASE_A	0x5f1ac
+#define _PIPEDMC_DCB_MAX_INCREASE_B	0x5f5ac
+#define PIPEDMC_DCB_MAX_INCREASE(pipe)	_MMIO_PIPE((pipe), _PIPEDMC_DCB_MAX_INCREASE_A, _PIPEDMC_DCB_MAX_INCREASE_B)
+
+#define _PIPEDMC_DCB_MAX_DECREASE_A	0x5f1b0
+#define _PIPEDMC_DCB_MAX_DECREASE_B	0x5f5b0
+#define PIPEDMC_DCB_MAX_DECREASE(pipe)	_MMIO_PIPE((pipe), _PIPEDMC_DCB_MAX_DECREASE_A, _PIPEDMC_DCB_MAX_DECREASE_B)
+
+#define _PIPEDMC_DCB_GUARDBAND_A	0x5f1b4
+#define _PIPEDMC_DCB_GUARDBAND_B	0x5f5b4
+#define PIPEDMC_DCB_GUARDBAND(pipe)	_MMIO_PIPE((pipe), _PIPEDMC_DCB_GUARDBAND_A, _PIPEDMC_DCB_GUARDBAND_B)
+
+#define _PIPEDMC_DCB_SLOPE_A		0x5f1b8
+#define _PIPEDMC_DCB_SLOPE_B		0x5f5b8
+#define PIPEDMC_DCB_SLOPE(pipe)		_MMIO_PIPE((pipe), _PIPEDMC_DCB_SLOPE_A, _PIPEDMC_DCB_SLOPE_B)
+
+#define _PIPEDMC_DCB_VBLANK_A		0x5f1bc
+#define _PIPEDMC_DCB_VBLANK_B		0x5f5bc
+#define PIPEDMC_DCB_VBLANK(pipe)	_MMIO_PIPE((pipe), _PIPEDMC_DCB_VBLANK_A, _PIPEDMC_DCB_VBLANK_B)
+
+#define _PIPEDMC_DCB_DEBUG_A		0x5f1c0
+#define _PIPEDMC_DCB_DEBUG_B		0x5f5c0
+#define PIPEDMC_DCB_DEBUG(pipe)		_MMIO_PIPE((pipe), _PIPEDMC_DCB_DEBUG_A, _PIPEDMC_DCB_DEBUG_B)
+
 #endif /* __INTEL_DMC_REGS_H__ */
-- 
2.48.1