[PATCH v1 0/8] Enable/Disable DC balance along with VRR DSB
Ville Syrjälä
ville.syrjala at linux.intel.com
Wed Apr 16 15:12:57 UTC 2025
On Wed, Apr 16, 2025 at 06:07:00PM +0300, Ville Syrjälä wrote:
> On Wed, Apr 16, 2025 at 11:57:29AM +0530, Mitul Golani wrote:
> > Control DC Balance Adjustment bit to accomodate changes along
> > with VRR DSB implementation.
> >
> > Mitul Golani (8):
> > drm/i915/vrr: Add DC balance registers
> > drm/i915/dmc: Add pipe DMC DC balance registers
> > drm/i915/vrr: Refactor vmin/vmax stuff
> > drm/i915/vrr: Add functions to read out vmin/vmax stuff
> > drm/i915: Extract vrr_vblank_start()
> > drm/i915/vrr: Implement vblank evasion with DC balancing
> > drm/i915/dsb: Add pipedmc dc balance enable/disable
> > drm/i915/vrr: Pause DC balancing for DSB commits
>
> Looks like you've messed up the authorship of most of these.
Thse in fact just look like what I had. Where is the stuff to
actually program the DC balance parameters?
>
> >
> > drivers/gpu/drm/i915/display/intel_display.c | 13 ++
> > .../drm/i915/display/intel_display_types.h | 2 +-
> > drivers/gpu/drm/i915/display/intel_dmc.c | 16 ++
> > drivers/gpu/drm/i915/display/intel_dmc.h | 5 +
> > drivers/gpu/drm/i915/display/intel_dmc_regs.h | 37 +++++
> > drivers/gpu/drm/i915/display/intel_dsb.c | 31 +++-
> > drivers/gpu/drm/i915/display/intel_vblank.c | 33 ++++-
> > drivers/gpu/drm/i915/display/intel_vrr.c | 138 +++++++++++++-----
> > drivers/gpu/drm/i915/display/intel_vrr.h | 5 +
> > drivers/gpu/drm/i915/display/intel_vrr_regs.h | 43 ++++++
> > 10 files changed, 284 insertions(+), 39 deletions(-)
> >
> > --
> > 2.48.1
>
> --
> Ville Syrjälä
> Intel
--
Ville Syrjälä
Intel
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