[PATCH v9 06/10] drm/i915/lobf: Update lobf if any change in dependent parameters

Manna, Animesh animesh.manna at intel.com
Tue Apr 22 14:16:40 UTC 2025



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander at intel.com>
> Sent: Tuesday, April 22, 2025 5:19 PM
> To: intel-xe at lists.freedesktop.org; Manna, Animesh
> <animesh.manna at intel.com>; intel-gfx at lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula at intel.com>; B, Jeevan <jeevan.b at intel.com>
> Subject: Re: [PATCH v9 06/10] drm/i915/lobf: Update lobf if any change in
> dependent parameters
> 
> On Thu, 2025-04-17 at 15:11 +0530, Animesh Manna wrote:
> > For every commit the dependent condition for LOBF is checked and
> > accordingly update has_lobf flag which will be used to update the
> > ALPM_CTL register during commit.
> >
> > v1: Initial version.
> > v2: Avoid reading h/w register without has_lobf check. [Jani]
> > v3: Update LOBF in post plane update instead of separate function.
> > [Jouni]
> > v4:
> > - Add lobf disable print. [Jouni]
> > - Simplify condition check for enabling/disabling lobf. [Jouni]
> > v5: Disable LOBF in pre_plane_update(). [Jouni]
> >
> > Signed-off-by: Animesh Manna <animesh.manna at intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_alpm.c    | 43
> > +++++++++++++++++++-
> >  drivers/gpu/drm/i915/display/intel_alpm.h    |  2 +
> >  drivers/gpu/drm/i915/display/intel_display.c |  1 +
> >  3 files changed, 45 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 01949b90c0c3..3fbe8eca1301 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -376,15 +376,56 @@ void intel_alpm_configure(struct intel_dp
> > *intel_dp,
> >  	intel_dp->alpm_parameters.transcoder = crtc_state-
> > >cpu_transcoder;
> >  }
> >
> > +void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
> > +				 struct intel_crtc *crtc)
> > +{
> > +	struct intel_display *display = to_intel_display(state);
> > +	const struct intel_crtc_state *crtc_state =
> > +		intel_atomic_get_new_crtc_state(state, crtc);
> > +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > +	struct intel_encoder *encoder;
> > +	u32 alpm_ctl;
> > +
> > +	if (DISPLAY_VER(display) < 20)
> > +		return;
> > +
> > +	if (crtc_state->has_lobf)
> > +		return;
> > +
> > +	for_each_intel_encoder_mask(display->drm, encoder,
> > +				    crtc_state->uapi.encoder_mask) {
> > +		struct intel_dp *intel_dp;
> > +
> > +		if (!intel_encoder_is_dp(encoder))
> > +			continue;
> > +
> > +		intel_dp = enc_to_intel_dp(encoder);
> > +
> > +		if (!intel_dp_is_edp(intel_dp))
> > +			continue;
> > +
> > +		alpm_ctl = intel_de_read(display, ALPM_CTL(display,
> > cpu_transcoder));
> 
> How about if instead of reading you would rely on old_crtc_state-
> >has_lobf as is done in intel_alpm_post_plane_update ? I think you can
> write 0 into ALPM_CTL. Parameters are anyways written in
> intel_alpm_post_plane_update when ALPM is enable for LOBF or PSR.

Writing 0 to ALPM_CTL maybe not good as some bitfields of ALPM_CTL are used by DMC
And dynamically enabling/disabling LOBF can be impacted though it is not very clear from bspec.
Still do you see this change as nice to have or must have.

Regards,
Animesh

> 
> BR,
> 
> Jouni Högander
> > +
> > +		if (alpm_ctl & ALPM_CTL_LOBF_ENABLE) {
> > +			alpm_ctl &= ~ALPM_CTL_LOBF_ENABLE;
> > +			intel_de_write(display, ALPM_CTL(display,
> > cpu_transcoder), alpm_ctl);
> > +			drm_dbg_kms(display->drm, "Link off between
> > frames (LOBF) disabled\n");
> > +		}
> > +	}
> > +}
> > +
> >  void intel_alpm_post_plane_update(struct intel_atomic_state *state,
> >  				  struct intel_crtc *crtc)
> >  {
> >  	struct intel_display *display = to_intel_display(state);
> >  	const struct intel_crtc_state *crtc_state =
> >  		intel_atomic_get_new_crtc_state(state, crtc);
> > +	const struct intel_crtc_state *old_crtc_state =
> > +		intel_atomic_get_old_crtc_state(state, crtc);
> >  	struct intel_encoder *encoder;
> >
> > -	if (!crtc_state->has_lobf && !crtc_state->has_psr)
> > +	if ((!crtc_state->has_lobf ||
> > +	     crtc_state->has_lobf == old_crtc_state->has_lobf) &&
> > !crtc_state->has_psr)
> >  		return;
> >
> >  	for_each_intel_encoder_mask(display->drm, encoder, diff --git
> > a/drivers/gpu/drm/i915/display/intel_alpm.h
> > b/drivers/gpu/drm/i915/display/intel_alpm.h
> > index 91f51fb24f98..77bae022a0ea 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> > @@ -23,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp
> > *intel_dp,
> >  				    struct drm_connector_state
> > *conn_state);
> >  void intel_alpm_configure(struct intel_dp *intel_dp,
> >  			  const struct intel_crtc_state
> > *crtc_state);
> > +void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
> > +				 struct intel_crtc *crtc);
> >  void intel_alpm_post_plane_update(struct intel_atomic_state *state,
> >  				  struct intel_crtc *crtc);
> >  void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 96a95bc9d5bf..f91401ebdd1a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -1177,6 +1177,7 @@ static void intel_pre_plane_update(struct
> > intel_atomic_state *state,
> >  		intel_atomic_get_new_crtc_state(state, crtc);
> >  	enum pipe pipe = crtc->pipe;
> >
> > +	intel_alpm_pre_plane_update(state, crtc);
> >  	intel_psr_pre_plane_update(state, crtc);
> >
> >  	if (intel_crtc_vrr_disabling(state, crtc)) {



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