[PATCH 00/19] drm/i915/tc: Fix enabled/disconnected DP-alt sink handling

Imre Deak imre.deak at intel.com
Wed Aug 6 11:54:49 UTC 2025


On Wed, Aug 06, 2025 at 02:44:41PM +0300, Luca Coelho wrote:
> On Tue, 2025-08-05 at 10:36 +0300, Imre Deak wrote:
> > This patchset fixes an issue on LNL+, where the TypeC PHY's mode/state
> > is detected incorrectly during HW readout for a DP-alt sink that got
> > enabled by BIOS/GOP, but later the sink got disconnected by the user
> > before the driver got loaded.
> > 
> > The issue in the driver is due to overlooking a change on LNL+ in the
> > way the PHY ready flag and pin assignment is set/cleared in the PHY
> > registers by the HW/FW wrt. how this works on all the earlier (ICL-MTL)
> > TypeC platforms.
> > 
> > The first 5 patches fix the issue, the rest refactor the PHY's max lane
> > count and pin assignment query functions, sanitizing the code, removing
> > duplications and validating the register values read out from the HW.
> 
> If you have 5 fix patches and the rest is refactoring, wouldn't it be
> better to split the series in two?

The refactoring part depends on the changes in the fixes part, so I
couldn't send the refactoring part separately.

> --
> Cheers,
> Luca.


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