[PATCH 3/3] drm/i915/gt: Relocate Gen6 context-specific workaround

Andi Shyti andi.shyti at kernel.org
Sat Aug 9 00:34:18 UTC 2025


Hi Sebastian,

On Fri, Aug 01, 2025 at 09:49:08AM +0000, Sebastian Brzezinka wrote:
> The workaround for disabling Render Cache Operational Flush
> (WaDisable_RenderCache_OperationalFlush:snb) was previously applied
> in rcs_engine_wa_init(). As it's a context workaround specific to Gen6,
> move it to gen6_ctx_workarounds_init() for proper platform-specific
> context setup.
> 
> CM0_STC_EVICT_DISABLE_LRA_SNB is also Gen6-specific, but it does
> not stick when applied in context, so it remains in engine init.

clear!

I believe this is

BSPEC: 11322

> Signed-off-by: Sebastian Brzezinka <sebastian.brzezinka at intel.com>

Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com>

Thanks,
Andi


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