[PATCH v6 6/6] drm/i915/display: Load the lut values and enable sharpness
Nautiyal, Ankit K
ankit.k.nautiyal at intel.com
Tue Feb 25 10:03:01 UTC 2025
On 2/19/2025 5:23 PM, Nemesa Garg wrote:
> Load the lut values during pipe enable.
>
> v2: Add the display version check
> v3: Fix build issue
> v4: Rebase
> v5: Add HAS_CASF macro. [Ankit]
> Add scaler_id check while reading state. [Ankit]
> v6: Modify the disable condition.
>
> Signed-off-by: Nemesa Garg <nemesa.garg at intel.com>
> Reviewed-by: Naga Venkata Srikanth V <nagavenkata.srikanth.v at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_crtc.c | 3 ++
> drivers/gpu/drm/i915/display/intel_display.c | 32 +++++++++++++++++++
> .../drm/i915/display/intel_display_types.h | 2 ++
> drivers/gpu/drm/i915/display/skl_scaler.c | 32 +++++++++++++++----
> 4 files changed, 63 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index 5b2603ef2ff7..b8bd255e9555 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -391,6 +391,9 @@ int intel_crtc_init(struct intel_display *display, enum pipe pipe)
>
> drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
>
> + if (HAS_CASF(dev_priv))
> + drm_crtc_create_sharpness_strength_property(&crtc->base);
> +
> return 0;
>
> fail:
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index cf807e0931ea..38f333e78031 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1065,6 +1065,25 @@ static bool audio_disabling(const struct intel_crtc_state *old_crtc_state,
> memcmp(old_crtc_state->eld, new_crtc_state->eld, MAX_ELD_BYTES) != 0);
> }
>
> +static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> + const struct intel_crtc_state *old_crtc_state)
> +{
> + if (!new_crtc_state->hw.active)
> + return false;
> +
> + return is_enabling(hw.casf_params.casf_enable, old_crtc_state, new_crtc_state);
> +}
> +
> +static bool intel_casf_disabling(const struct intel_crtc_state *new_crtc_state,
> + const struct intel_crtc_state *old_crtc_state)
> +{
> + if (!new_crtc_state->hw.active)
> + return false;
> +
> + return (new_crtc_state->hw.casf_params.casf_enable !=
> + old_crtc_state->hw.casf_params.casf_enable);
> +}
> +
> #undef is_disabling
> #undef is_enabling
>
> @@ -1211,6 +1230,9 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
> if (audio_disabling(old_crtc_state, new_crtc_state))
> intel_encoders_audio_disable(state, crtc);
>
> + if (intel_casf_disabling(old_crtc_state, new_crtc_state))
> + intel_casf_disable(new_crtc_state);
> +
> intel_drrs_deactivate(old_crtc_state);
>
> intel_psr_pre_plane_update(state, crtc);
> @@ -1679,6 +1701,8 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> struct intel_display *display = to_intel_display(state);
> const struct intel_crtc_state *new_crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
> struct intel_crtc *pipe_crtc;
> @@ -1772,6 +1796,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> intel_crtc_wait_for_next_vblank(wa_crtc);
> }
> }
> +
> + if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> + intel_filter_lut_load(crtc, new_crtc_state);
> }
>
> void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state)
> @@ -6880,6 +6907,11 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
> intel_vrr_set_transcoder_timings(new_crtc_state);
> }
>
> + if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> + intel_casf_enable(new_crtc_state);
> + else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
> + intel_casf_update_strength(new_crtc_state);
> +
> intel_fbc_update(state, crtc);
>
> drm_WARN_ON(display->drm, !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF));
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 1320ff888fdd..a06f01d62606 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -937,6 +937,8 @@ struct intel_casf {
> struct scaler_filter_coeff coeff[SCALER_FILTER_NUM_TAPS];
> u8 win_size;
> bool casf_enable;
> + bool strength_changed;
strength_changed is not used anywhere.
> + u8 strength;
> };
>
> void intel_io_mmio_fw_write(void *ctx, i915_reg_t reg, u32 val);
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 9d687298a9a6..03f0e800c8e9 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -10,6 +10,7 @@
> #include "intel_display_trace.h"
> #include "intel_display_types.h"
> #include "intel_fb.h"
> +#include "intel_casf_regs.h"
> #include "skl_scaler.h"
> #include "skl_universal_plane.h"
>
> @@ -946,7 +947,7 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
>
> /* find scaler attached to this pipe */
> for (i = 0; i < crtc->num_scalers; i++) {
> - u32 ctl, pos, size;
> + u32 ctl, pos, size, sharp;
>
> ctl = intel_de_read(display, SKL_PS_CTRL(crtc->pipe, i));
> if ((ctl & (PS_SCALER_EN | PS_BINDING_MASK)) != (PS_SCALER_EN | PS_BINDING_PIPE))
> @@ -954,14 +955,33 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
>
> id = i;
>
> + if (HAS_CASF(display) && id == 1) {
> + sharp = intel_de_read(display, SHARPNESS_CTL(crtc->pipe));
> + if (sharp & FILTER_EN) {
> + if (drm_WARN_ON(display->drm,
> + REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp) < 16))
> + crtc_state->hw.casf_params.strength = 0;
> + else
> + crtc_state->hw.casf_params.strength =
> + REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp) - 16;
> + crtc_state->hw.casf_params.casf_enable = true;
> + crtc_state->hw.casf_params.win_size =
> + REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
> + }
> + }
> +
> + if (!crtc_state->hw.casf_params.casf_enable)
> + crtc_state->pch_pfit.enabled = true;
> +
> pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
> size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
>
> - drm_rect_init(&crtc_state->pch_pfit.dst,
> - REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
> - REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
> - REG_FIELD_GET(PS_WIN_XSIZE_MASK, size),
> - REG_FIELD_GET(PS_WIN_YSIZE_MASK, size));
> + if (!crtc_state->hw.casf_params.casf_enable)
> + drm_rect_init(&crtc_state->pch_pfit.dst,
> + REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
> + REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
> + REG_FIELD_GET(PS_WIN_XSIZE_MASK, size),
> + REG_FIELD_GET(PS_WIN_YSIZE_MASK, size));
This is doing a lot of things again. Need to split into separate patches.
Regards,
Ankit
>
> scaler_state->scalers[i].in_use = true;
> break;
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