[PATCH] i915/gt/selftest_lrc: Remove timestamp test
Tvrtko Ursulin
tursulin at ursulin.net
Tue Mar 4 15:43:45 UTC 2025
On 04/03/2025 13:09, Mikolaj Wasiak wrote:
> This test exposes bug in tigerlake hardware which prevents it from
> succeeding. Since the tested feature is only available on bugged hardware
> and we won't support any new hardware, this test is obsolete and
> should be removed.
I randomly clicked on one TGL, one DG2, one MTL and one RKL in the CI
and only saw test passes. Then I looked at the patch below to see if
there is a skip condition but don't see one. So I end up confused since
commit message is making it sound like this only exists on Tigerlake and
it's failing all the time. Is it perhaps a sporadic failure? On all
platforms or just TGL? What am I missing?
Regards,
Tvrtko
> Signed-off-by: Mikolaj Wasiak <mikolaj.wasiak at intel.com>
> ---
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 215 -------------------------
> 1 file changed, 215 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 22e750108c5f..aa9b8af61ba6 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -105,32 +105,6 @@ static int emit_semaphore_signal(struct intel_context *ce, void *slot)
> return 0;
> }
>
> -static int context_flush(struct intel_context *ce, long timeout)
> -{
> - struct i915_request *rq;
> - struct dma_fence *fence;
> - int err = 0;
> -
> - rq = intel_engine_create_kernel_request(ce->engine);
> - if (IS_ERR(rq))
> - return PTR_ERR(rq);
> -
> - fence = i915_active_fence_get(&ce->timeline->last_request);
> - if (fence) {
> - i915_request_await_dma_fence(rq, fence);
> - dma_fence_put(fence);
> - }
> -
> - rq = i915_request_get(rq);
> - i915_request_add(rq);
> - if (i915_request_wait(rq, 0, timeout) < 0)
> - err = -ETIME;
> - i915_request_put(rq);
> -
> - rmb(); /* We know the request is written, make sure all state is too! */
> - return err;
> -}
> -
> static int get_lri_mask(struct intel_engine_cs *engine, u32 lri)
> {
> if ((lri & MI_LRI_LRM_CS_MMIO) == 0)
> @@ -733,194 +707,6 @@ static int live_lrc_gpr(void *arg)
> return err;
> }
>
> -static struct i915_request *
> -create_timestamp(struct intel_context *ce, void *slot, int idx)
> -{
> - const u32 offset =
> - i915_ggtt_offset(ce->engine->status_page.vma) +
> - offset_in_page(slot);
> - struct i915_request *rq;
> - u32 *cs;
> - int err;
> -
> - rq = intel_context_create_request(ce);
> - if (IS_ERR(rq))
> - return rq;
> -
> - cs = intel_ring_begin(rq, 10);
> - if (IS_ERR(cs)) {
> - err = PTR_ERR(cs);
> - goto err;
> - }
> -
> - *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
> - *cs++ = MI_NOOP;
> -
> - *cs++ = MI_SEMAPHORE_WAIT |
> - MI_SEMAPHORE_GLOBAL_GTT |
> - MI_SEMAPHORE_POLL |
> - MI_SEMAPHORE_SAD_NEQ_SDD;
> - *cs++ = 0;
> - *cs++ = offset;
> - *cs++ = 0;
> -
> - *cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT;
> - *cs++ = i915_mmio_reg_offset(RING_CTX_TIMESTAMP(rq->engine->mmio_base));
> - *cs++ = offset + idx * sizeof(u32);
> - *cs++ = 0;
> -
> - intel_ring_advance(rq, cs);
> -
> - err = 0;
> -err:
> - i915_request_get(rq);
> - i915_request_add(rq);
> - if (err) {
> - i915_request_put(rq);
> - return ERR_PTR(err);
> - }
> -
> - return rq;
> -}
> -
> -struct lrc_timestamp {
> - struct intel_engine_cs *engine;
> - struct intel_context *ce[2];
> - u32 poison;
> -};
> -
> -static bool timestamp_advanced(u32 start, u32 end)
> -{
> - return (s32)(end - start) > 0;
> -}
> -
> -static int __lrc_timestamp(const struct lrc_timestamp *arg, bool preempt)
> -{
> - u32 *slot = memset32(arg->engine->status_page.addr + 1000, 0, 4);
> - struct i915_request *rq;
> - u32 timestamp;
> - int err = 0;
> -
> - arg->ce[0]->lrc_reg_state[CTX_TIMESTAMP] = arg->poison;
> - rq = create_timestamp(arg->ce[0], slot, 1);
> - if (IS_ERR(rq))
> - return PTR_ERR(rq);
> -
> - err = wait_for_submit(rq->engine, rq, HZ / 2);
> - if (err)
> - goto err;
> -
> - if (preempt) {
> - arg->ce[1]->lrc_reg_state[CTX_TIMESTAMP] = 0xdeadbeef;
> - err = emit_semaphore_signal(arg->ce[1], slot);
> - if (err)
> - goto err;
> - } else {
> - slot[0] = 1;
> - wmb();
> - }
> -
> - /* And wait for switch to kernel (to save our context to memory) */
> - err = context_flush(arg->ce[0], HZ / 2);
> - if (err)
> - goto err;
> -
> - if (!timestamp_advanced(arg->poison, slot[1])) {
> - pr_err("%s(%s): invalid timestamp on restore, context:%x, request:%x\n",
> - arg->engine->name, preempt ? "preempt" : "simple",
> - arg->poison, slot[1]);
> - err = -EINVAL;
> - }
> -
> - timestamp = READ_ONCE(arg->ce[0]->lrc_reg_state[CTX_TIMESTAMP]);
> - if (!timestamp_advanced(slot[1], timestamp)) {
> - pr_err("%s(%s): invalid timestamp on save, request:%x, context:%x\n",
> - arg->engine->name, preempt ? "preempt" : "simple",
> - slot[1], timestamp);
> - err = -EINVAL;
> - }
> -
> -err:
> - memset32(slot, -1, 4);
> - i915_request_put(rq);
> - return err;
> -}
> -
> -static int live_lrc_timestamp(void *arg)
> -{
> - struct lrc_timestamp data = {};
> - struct intel_gt *gt = arg;
> - enum intel_engine_id id;
> - const u32 poison[] = {
> - 0,
> - S32_MAX,
> - (u32)S32_MAX + 1,
> - U32_MAX,
> - };
> -
> - /*
> - * We want to verify that the timestamp is saved and restore across
> - * context switches and is monotonic.
> - *
> - * So we do this with a little bit of LRC poisoning to check various
> - * boundary conditions, and see what happens if we preempt the context
> - * with a second request (carrying more poison into the timestamp).
> - */
> -
> - for_each_engine(data.engine, gt, id) {
> - int i, err = 0;
> -
> - st_engine_heartbeat_disable(data.engine);
> -
> - for (i = 0; i < ARRAY_SIZE(data.ce); i++) {
> - struct intel_context *tmp;
> -
> - tmp = intel_context_create(data.engine);
> - if (IS_ERR(tmp)) {
> - err = PTR_ERR(tmp);
> - goto err;
> - }
> -
> - err = intel_context_pin(tmp);
> - if (err) {
> - intel_context_put(tmp);
> - goto err;
> - }
> -
> - data.ce[i] = tmp;
> - }
> -
> - for (i = 0; i < ARRAY_SIZE(poison); i++) {
> - data.poison = poison[i];
> -
> - err = __lrc_timestamp(&data, false);
> - if (err)
> - break;
> -
> - err = __lrc_timestamp(&data, true);
> - if (err)
> - break;
> - }
> -
> -err:
> - st_engine_heartbeat_enable(data.engine);
> - for (i = 0; i < ARRAY_SIZE(data.ce); i++) {
> - if (!data.ce[i])
> - break;
> -
> - intel_context_unpin(data.ce[i]);
> - intel_context_put(data.ce[i]);
> - }
> -
> - if (igt_flush_test(gt->i915))
> - err = -EIO;
> - if (err)
> - return err;
> - }
> -
> - return 0;
> -}
> -
> static struct i915_vma *
> create_user_vma(struct i915_address_space *vm, unsigned long size)
> {
> @@ -1971,7 +1757,6 @@ int intel_lrc_live_selftests(struct drm_i915_private *i915)
> SUBTEST(live_lrc_state),
> SUBTEST(live_lrc_gpr),
> SUBTEST(live_lrc_isolation),
> - SUBTEST(live_lrc_timestamp),
> SUBTEST(live_lrc_garbage),
> SUBTEST(live_pphwsp_runtime),
> SUBTEST(live_lrc_indirect_ctx_bb),
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