[PATCH v2 1/2] drm/xe/compat: refactor compat i915_drv.h
Jani Nikula
jani.nikula at intel.com
Wed Mar 5 16:38:22 UTC 2025
The compat i915_drv.h contains things that aren't there in the original
i915_drv.h. Split out gem/i915_gem_object.h and i915_scheduler_types.h,
moving the corresponding pieces out, including FORCEWAKE_ALL to
intel_uncore.h.
Technically I915_PRIORITY_DISPLAY should be in i915_priolist_types.h,
but it's a bit overkill to split out another file just for
that. i915_scheduler_types.h shall do.
With this, the compat i915_drv.h becomes a strict subset of the
original.
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 2 ++
.../xe/compat-i915-headers/gem/i915_gem_object.h | 15 +++++++++++++++
drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 8 --------
.../xe/compat-i915-headers/i915_scheduler_types.h | 13 +++++++++++++
.../gpu/drm/xe/compat-i915-headers/intel_uncore.h | 2 ++
5 files changed, 32 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index a26b54185d5b..d899c37d80c6 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -41,8 +41,10 @@
#include <drm/drm_gem.h>
#include <drm/drm_gem_atomic_helper.h>
+#include "gem/i915_gem_object.h"
#include "i915_config.h"
#include "i915_drv.h"
+#include "i915_scheduler_types.h"
#include "i915_vma.h"
#include "i9xx_plane_regs.h"
#include "intel_atomic_plane.h"
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
new file mode 100644
index 000000000000..03f35dce7b93
--- /dev/null
+++ b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_GEM_OBJECT_H__
+#define __i915_GEM_OBJECT_H__
+
+struct dma_fence;
+struct i915_sched_attr;
+
+static inline void i915_gem_fence_wait_priority(struct dma_fence *fence,
+ const struct i915_sched_attr *attr)
+{
+}
+
+#endif
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index 84b0991b35b3..dfec5108d2c3 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -95,14 +95,6 @@ static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
#define HAS_128_BYTE_Y_TILING(xe) (xe || 1)
-#define I915_PRIORITY_DISPLAY 0
-struct i915_sched_attr {
- int priority;
-};
-#define i915_gem_fence_wait_priority(fence, attr) do { (void) attr; } while (0)
-
-#define FORCEWAKE_ALL XE_FORCEWAKE_ALL
-
#ifdef CONFIG_ARM64
/*
* arm64 indirectly includes linux/rtc.h,
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h
new file mode 100644
index 000000000000..c11130440d31
--- /dev/null
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_SCHEDULER_TYPES_H__
+#define __I915_SCHEDULER_TYPES_H__
+
+#define I915_PRIORITY_DISPLAY 0
+
+struct i915_sched_attr {
+ int priority;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
index 4fc3e535de91..0c1e88e36a1e 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
@@ -10,6 +10,8 @@
#include "xe_device_types.h"
#include "xe_mmio.h"
+#define FORCEWAKE_ALL XE_FORCEWAKE_ALL
+
static inline struct intel_uncore *to_intel_uncore(struct drm_device *drm)
{
return &to_xe_device(drm)->uncore;
--
2.39.5
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