[PATCH 14/18] drm/i915/dpll: Rename intel_[enable/disable]_dpll

[Kandpal, Suraj]

> -----Original Message-----
> From: Jani Nikula <jani.nikula at linux.intel.com>
> Sent: Friday, May 9, 2025 3:59 PM
> To: Kandpal, Suraj <suraj.kandpal at intel.com>; intel-xe at lists.freedesktop.org;
> intel-gfx at lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal at intel.com>; Murthy, Arun R
> <arun.r.murthy at intel.com>; Kandpal, Suraj <suraj.kandpal at intel.com>
> Subject: Re: [PATCH 14/18] drm/i915/dpll: Rename intel_[enable/disable]_dpll
> 
> On Fri, 09 May 2025, Suraj Kandpal <suraj.kandpal at intel.com> wrote:
> > Rename  intel_[enable/disable]_dpll to intel_dpll_[enable/disable] in
> > an effort to make sure all functions that are exported start with the
> > filename.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal at intel.com>
> 
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>
> 
> I think you should repost the series with the controversial or incomplete stuff
> dropped, and get the straightforward renames merged.

I think you are correct , I'll break it into two series will send the controversial changes
With the second part where we refactor the rest of the dpll framework to take into account
The cx0 phy.

Regards,
Suraj Kandpal

> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c     | 4 ++--
> >  drivers/gpu/drm/i915/display/intel_dpll_mgr.c    | 8 ++++----
> >  drivers/gpu/drm/i915/display/intel_dpll_mgr.h    | 4 ++--
> >  drivers/gpu/drm/i915/display/intel_pch_display.c | 6 +++---
> >  4 files changed, 11 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index b091faff6680..8ee4833daede 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -1664,7 +1664,7 @@ static void hsw_crtc_enable(struct
> intel_atomic_state *state,
> >  	intel_encoders_pre_pll_enable(state, crtc);
> >
> >  	if (new_crtc_state->intel_dpll)
> > -		intel_enable_dpll(new_crtc_state);
> > +		intel_dpll_enable(new_crtc_state);
> >
> >  	intel_encoders_pre_enable(state, crtc);
> >
> > @@ -1793,7 +1793,7 @@ static void hsw_crtc_disable(struct
> intel_atomic_state *state,
> >  	intel_encoders_disable(state, crtc);
> >  	intel_encoders_post_disable(state, crtc);
> >
> > -	intel_disable_dpll(old_crtc_state);
> > +	intel_dpll_disable(old_crtc_state);
> >
> >  	intel_encoders_post_pll_disable(state, crtc);
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > index 3a724d84861b..d1399ab24d8c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > @@ -257,12 +257,12 @@ static void _intel_disable_shared_dpll(struct
> > intel_display *display,  }
> >
> >  /**
> > - * intel_enable_dpll - enable a CRTC's global DPLL
> > + * intel_dpll_enable - enable a CRTC's global DPLL
> >   * @crtc_state: CRTC, and its state, which has a DPLL
> >   *
> >   * Enable DPLL used by @crtc.
> >   */
> > -void intel_enable_dpll(const struct intel_crtc_state *crtc_state)
> > +void intel_dpll_enable(const struct intel_crtc_state *crtc_state)
> >  {
> >  	struct intel_display *display = to_intel_display(crtc_state);
> >  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > @@ -303,12 +303,12 @@ void intel_enable_dpll(const struct
> > intel_crtc_state *crtc_state)  }
> >
> >  /**
> > - * intel_disable_dpll - disable a CRTC's shared DPLL
> > + * intel_dpll_disable - disable a CRTC's shared DPLL
> >   * @crtc_state: CRTC, and its state, which has a shared DPLL
> >   *
> >   * Disable DPLL used by @crtc.
> >   */
> > -void intel_disable_dpll(const struct intel_crtc_state *crtc_state)
> > +void intel_dpll_disable(const struct intel_crtc_state *crtc_state)
> >  {
> >  	struct intel_display *display = to_intel_display(crtc_state);
> >  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > index 49eb02d72f44..f497a9ec863d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > @@ -417,8 +417,8 @@ int intel_dpll_get_freq(struct intel_crtc_state
> > *crtc_state,  bool intel_dpll_get_hw_state(struct intel_display *display,
> >  			     struct intel_dpll *pll,
> >  			     struct intel_dpll_hw_state *dpll_hw_state); -void
> > intel_enable_dpll(const struct intel_crtc_state *crtc_state); -void
> > intel_disable_dpll(const struct intel_crtc_state *crtc_state);
> > +void intel_dpll_enable(const struct intel_crtc_state *crtc_state);
> > +void intel_dpll_disable(const struct intel_crtc_state *crtc_state);
> >  void intel_dpll_swap_state(struct intel_atomic_state *state);  void
> > intel_dpll_init(struct intel_display *display);  void
> > intel_dpll_update_ref_clks(struct intel_display *display); diff --git
> > a/drivers/gpu/drm/i915/display/intel_pch_display.c
> > b/drivers/gpu/drm/i915/display/intel_pch_display.c
> > index b59b3c94f711..ca85596dfc9e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> > @@ -394,11 +394,11 @@ void ilk_pch_enable(struct intel_atomic_state
> *state,
> >  	 * transcoder, and we actually should do this to not upset any PCH
> >  	 * transcoder that already use the clock when we share it.
> >  	 *
> > -	 * Note that enable_dpll tries to do the right thing, but
> > +	 * Note that dpll_enable tries to do the right thing, but
> >  	 * get_dpll unconditionally resets the pll - we need that
> >  	 * to have the right LVDS enable sequence.
> >  	 */
> > -	intel_enable_dpll(crtc_state);
> > +	intel_dpll_enable(crtc_state);
> >
> >  	/* set transcoder timing, panel must allow it */
> >  	assert_pps_unlocked(display, pipe);
> > @@ -472,7 +472,7 @@ void ilk_pch_post_disable(struct
> > intel_atomic_state *state,
> >
> >  	ilk_fdi_pll_disable(crtc);
> >
> > -	intel_disable_dpll(old_crtc_state);
> > +	intel_dpll_disable(old_crtc_state);
> >  }
> >
> >  static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state)
> 
> --
> Jani Nikula, Intel