[PATCH 01/11] drm/dp: Add Panel Replay capability bits from DP2.1 specification
Nautiyal, Ankit K
ankit.k.nautiyal at intel.com
Tue May 20 08:36:45 UTC 2025
On 5/2/2025 2:28 PM, Jouni Högander wrote:
> Add PANEL REPLAY CAPABILITY register (0xb1) bits.
>
> Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
> ---
> include/drm/display/drm_dp.h | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 3001c0b6e7bb3..47e7d55e2803f 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -552,8 +552,14 @@
> # define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1)
> # define DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT (1 << 2) /* eDP 1.5 */
>
> -#define DP_PANEL_PANEL_REPLAY_CAPABILITY 0xb1
Though not introduced in this patch, the name
DP_PANEL_PANEL_REPLAY_CAPABILITY doesn’t seem quite right.
Since we are adding bits for Panel Replay capabilities, would it be more
appropriate to use DP_PANEL_REPLAY_CAPABILITY instead?
Also, IMHO, DP_PANEL_REPLAY_CAP could be renamed to
DP_PANEL_REPLAY_CAP_SUPPORT for better clarity.
Lastly, since Panel Replay capabilities are defined from 0xb0 to 0xb6,
perhaps we could introduce a DP_PANEL_REPLAY_CAP_SIZE to reflect the range?
Regards,
Ankit
> -# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED (1 << 5)
> +#define DP_PANEL_PANEL_REPLAY_CAPABILITY 0xb1
> +# define DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_SHIFT 1 /* DP 2.1 */
> +# define DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_MASK (3 << 1)
> +# define DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR (1 << 3)
> +# define DP_PANEL_REPLAY_DSC_CRC_OF_MULTIPLE_SUS_SUPPORTED (1 << 4)
> +# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED (1 << 5)
> +# define DP_PANEL_REPLAY_SU_Y_GRANULARITY_EXTENDED_CAPABILITY_SUPPORTED (1 << 6)
> +# define DP_PANEL_REPLAY_LINK_OFF_SUPPORTED_IN_PR_AFTER_ADAPTIVE_SYNC_SDP (1 << 7)
>
> #define DP_PANEL_PANEL_REPLAY_X_GRANULARITY 0xb2
> #define DP_PANEL_PANEL_REPLAY_Y_GRANULARITY 0xb4
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