[PATCH v2 02/12] drm/dp: Add Panel Replay capability bits from DP2.1 specification

[Hogander, Jouni]

On Wed, 2025-05-21 at 10:19 +0530, Nautiyal, Ankit K wrote:
> 
> On 5/20/2025 10:23 PM, Jouni Högander wrote:
> > Add PANEL REPLAY CAPABILITY register (0xb1) bits.
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
> > ---
> >   include/drm/display/drm_dp.h | 10 ++++++++--
> >   1 file changed, 8 insertions(+), 2 deletions(-)
> > 
> > diff --git a/include/drm/display/drm_dp.h
> > b/include/drm/display/drm_dp.h
> > index 3371e2edd9e9..91ee4c0ef0cd 100644
> > --- a/include/drm/display/drm_dp.h
> > +++ b/include/drm/display/drm_dp.h
> > @@ -554,8 +554,14 @@
> >   
> >   #define DP_PANEL_REPLAY_CAP_SIZE	7
> >   
> > -#define DP_PANEL_REPLAY_CAP_CAPABILITY			0xb1
> > -# define DP_PANEL_REPLAY_SU_GRANULARITY_REQUIRED	(1 << 5)
> > +#define
> > DP_PANEL_REPLAY_CAP_CAPABILITY					0xb1
> > +# define
> > DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_SHIFT			1 /* DP 2.1 */
> > +# define
> > DP_PANEL_REPLAY_DSC_DECODE_CAPABILITY_IN_PR_MASK			(3 << 1)
> 
> 
> This doesn't seem right. DSC Decode cap is only bit #2, as per DP
> 2.1.

It seems there is change here in DP2.1a. I will update comment to DP
2.1a

BR,

Jouni Högander
> 
> 
> Regards,
> 
> Ankit
> 
> > +# define
> > DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR			(1
> > << 3)
> > +# define
> > DP_PANEL_REPLAY_DSC_CRC_OF_MULTIPLE_SUS_SUPPORTED			(1 << 4)
> > +# define
> > DP_PANEL_REPLAY_SU_GRANULARITY_REQUIRED				(1 << 5)
> > +# define
> > DP_PANEL_REPLAY_SU_Y_GRANULARITY_EXTENDED_CAPABILITY_SUPPORTED	
> > 	(1 << 6)
> > +# define
> > DP_PANEL_REPLAY_LINK_OFF_SUPPORTED_IN_PR_AFTER_ADAPTIVE_SYNC_SDP
> > 	(1 << 7)
> >   
> >   #define DP_PANEL_REPLAY_CAP_X_GRANULARITY		0xb2
> >   #define DP_PANEL_REPLAY_CAP_Y_GRANULARITY		0xb4