[PATCH v2 07/12] drm/i915/flipq: Provide the nuts and bolts code for flip queue
Ville Syrjälä
ville.syrjala at linux.intel.com
Wed May 21 17:40:56 UTC 2025
On Tue, May 20, 2025 at 07:06:42AM +0000, Shankar, Uma wrote:
> > +static int intel_flipq_exec_time_us(struct intel_display *display) {
> > + /* TODO ask the DSB code what this should be */
> > + int dsb_exec_time = 20;
>
> I think optimum value would be 100.
> From bspec: "For the flip queue use case, the recommended DSB execution time is 100us + one SAGV block time"
That's just a random number someone pulled out of a hat. We currently
use 20 usec for the arming registers writes, and we don't have any estimate
for the non-arming stuff since we don't need it. But for flip queue we need
to guesstimate the whole thing, so I suppose I might as well slap in a 80usec
for the non-arming part now.
Ideally we should calculate this based on how many registers we are writing,
but that would require measuring the DSB execution speed and coming up with
a reasonable formula for it...
--
Ville Syrjälä
Intel
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