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On 25/08/2016 10:08, Chris Wilson wrote:<br>
<blockquote
cite="mid:20160825090839.9952-12-chris@chris-wilson.co.uk"
type="cite">
<pre wrap="">Now that we can wait upon fences before emitting the request, it becomes
trivial to wait upon any implicit fence provided by the dma-buf
reservation object.
Testcase: igt/prime_vgem/fence-wait
Signed-off-by: Chris Wilson <a class="moz-txt-link-rfc2396E" href="mailto:chris@chris-wilson.co.uk"><chris@chris-wilson.co.uk></a>
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 104c713ec681..d9b6fe9f7542 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1197,6 +1197,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
list_for_each_entry(vma, vmas, exec_list) {
struct drm_i915_gem_object *obj = vma->obj;
+ struct reservation_object *resv;
if (obj->flags & other_rings) {
ret = eb_sync(obj, req, obj->base.pending_write_domain);
@@ -1204,6 +1205,16 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
return ret;
}
+ resv = i915_gem_object_get_dmabuf_resv(obj);
+ if (resv) {
+ ret = i915_sw_fence_await_reservation
+ (&req->submit, resv, &i915_fence_ops,
+ obj->base.pending_write_domain,
+ GFP_KERNEL | __GFP_NOWARN);
+ if (ret < 0)
+ return ret;
+ }
+
if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
i915_gem_clflush_object(obj, false);
}
</pre>
</blockquote>
<br>
<br>
Reviewed-by: John Harrison <a moz-do-not-send="true"
class="moz-txt-link-rfc2396E"
href="mailto:john.c.harrison@intel.com"><john.c.harrison@intel.com></a><br>
<br>
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