<div dir="ltr"><div>Thanks for sending out. It looked good to me, but testing shows a 'divide error'.<br><br></div>I haven't double checked, but I think it's because the max OA exponent (31) converted to nanoseconds is > UINT32_MAX with the lower 32bits zero and the do_div denominator argument is only 32bit.<br><div><br></div><div>It corresponds to a 5 minute period which is a bit silly, so we could reduce the max exponent. A period of UINT32_MAX is about 4 seconds where I can't currently think of a good use case for such a low frequency.<br><br></div><div>Instead of changing the max OA exponent (where the relationship to the period changes for gen9 and may become fuzzy if we start training our view of the gpu timestamp frequency instead of using constants) maybe we should set an early limit on an exponent resulting in a period > UINT32_MAX?<br></div><div><br></div><div>- Robert<br><br></div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Nov 22, 2016 at 9:14 PM, Chris Wilson <span dir="ltr"><<a href="mailto:chris@chris-wilson.co.uk" target="_blank">chris@chris-wilson.co.uk</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Just a couple of naked 64bit divides causing link errors on 32bit<br>
builds, with:<br>
<br>
ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!<br>
<br>
Reported-by: kbuild test robot <<a href="mailto:fengguang.wu@intel.com" target="_blank">fengguang.wu@intel.com</a>><br>
Fixes: d79651522e89 ("drm/i915: Enable i915 perf stream for Haswell OA unit")<br>
Signed-off-by: Chris Wilson <<a href="mailto:chris@chris-wilson.co.uk" target="_blank">chris@chris-wilson.co.uk</a>><br>
Cc: Robert Bragg <<a href="mailto:robert@sixbynine.org" target="_blank">robert@sixbynine.org</a>><br>
---<br>
drivers/gpu/drm/i915/i915_per<wbr>f.c | 17 +++++++++++------<br>
1 file changed, 11 insertions(+), 6 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/i915/i915_pe<wbr>rf.c b/drivers/gpu/drm/i915/i915_pe<wbr>rf.c<br>
index 95512824922b..7d00532ae010 100644<br>
--- a/drivers/gpu/drm/i915/i915_pe<wbr>rf.c<br>
+++ b/drivers/gpu/drm/i915/i915_pe<wbr>rf.c<br>
@@ -974,8 +974,12 @@ static void i915_oa_stream_disable(struct i915_perf_stream *stream)<br>
<br>
static u64 oa_exponent_to_ns(struct drm_i915_private *dev_priv, int exponent)<br>
{<br>
- return 1000000000ULL * (2ULL << exponent) /<br>
- dev_priv->perf.oa.timestamp_f<wbr>requency;<br>
+ u64 interval;<br>
+<br>
+ interval = 1000000000ULL * (2ULL << exponent);<br>
+ do_div(interval, dev_priv->perf.oa.timestamp_fr<wbr>equency);<br>
+<br>
+ return interval;<br>
}<br>
<br>
static const struct i915_perf_stream_ops i915_oa_stream_ops = {<br>
@@ -1051,16 +1055,17 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,<br>
<br>
dev_priv->perf.oa.periodic = props->oa_periodic;<br>
if (dev_priv->perf.oa.periodic) {<br>
- u64 period_ns = oa_exponent_to_ns(dev_priv,<br>
- props->oa_period_exponent);<br>
+ u64 margin;<br>
<br>
dev_priv->perf.oa.period_expon<wbr>ent = props->oa_period_exponent;<br>
<br>
/* See comment for OA_TAIL_MARGIN_NSEC for details<br>
* about this tail_margin...<br>
*/<br>
- dev_priv->perf.oa.tail_margin =<br>
- ((OA_TAIL_MARGIN_NSEC / period_ns) + 1) * format_size;<br>
+ margin = OA_TAIL_MARGIN_NSEC;<br>
+ do_div(margin,<br>
+ oa_exponent_to_ns(dev_priv, props->oa_period_exponent));<br>
+ dev_priv->perf.oa.tail_margin = (margin + 1) * format_size;<br>
}<br>
<br>
if (stream->ctx) {<br>
<span class="m_8532959515663170569HOEnZb"><font color="#888888">--<br>
2.10.2<br>
<br>
</font></span></blockquote></div><br></div></div>