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<p>Reviewed-by: Sagar Arun Kamble <a class="moz-txt-link-rfc2396E"
href="mailto:sagar.a.kamble@intel.com"><sagar.a.kamble@intel.com></a><br>
</p>
<div class="moz-cite-prefix">On 3/24/2017 8:18 PM, Daniele Ceraolo
Spurio wrote:<br>
</div>
<blockquote
cite="mid:1490366919-34715-1-git-send-email-daniele.ceraolospurio@intel.com"
type="cite">
<pre wrap="">The forcewake_get call in the guc_send_mmio function was added to
avoid getting and releasing forcewake on each register access.
While this makes sense, all GuC registers are in the blitter range
so no need to wake all the wells.
Signed-off-by: Daniele Ceraolo Spurio <a class="moz-txt-link-rfc2396E" href="mailto:daniele.ceraolospurio@intel.com"><daniele.ceraolospurio@intel.com></a>
---
drivers/gpu/drm/i915/intel_uc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 4a872cd..e016227 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -245,7 +245,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len)
return -EINVAL;
mutex_lock(&guc->send_mutex);
- intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_BLITTER);
dev_priv->guc.action_count += 1;
dev_priv->guc.action_cmd = action[0];
@@ -283,7 +283,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len)
}
dev_priv->guc.action_status = status;
- intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_BLITTER);
mutex_unlock(&guc->send_mutex);
return ret;
</pre>
</blockquote>
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