<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Apr 12, 2017 at 1:34 PM, Matthew Auld <span dir="ltr"><<a href="mailto:matthew.william.auld@gmail.com" target="_blank">matthew.william.auld@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On 5 April 2017 at 20:05, Robert Bragg <<a href="mailto:robert@sixbynine.org">robert@sixbynine.org</a>> wrote:<br>
> An oa_exponent_to_ns() utility and per-gen timebase constants where<br>
</span>were<br>
<div><div class="h5"><br>
> recently removed when updating the tail pointer race condition WA, and<br>
> this restores those so we can update the _PROP_OA_EXPONENT validation<br>
> done in read_properties_unlocked() to not assume we have a 12.5MHz<br>
> timebase as we did for Haswell.<br>
><br>
> Accordingly the oa_sample_rate_hard_limit value that's referenced by<br>
> proc_dointvec_minmax defining the absolute limit for the OA sampling<br>
> frequency is now initialized to (timestamp_frequency / 2) instead of the<br>
> 6.25MHz constant for Haswell.<br>
><br>
> v2:<br>
> Specify frequency of 19.2MHz for BXT (Ville)<br>
> Initialize oa_sample_rate_hard_limit per-gen too (Lionel)<br>
><br>
> Signed-off-by: Robert Bragg <<a href="mailto:robert@sixbynine.org">robert@sixbynine.org</a>><br>
> Cc: Lionel Landwerlin <<a href="mailto:lionel.g.landwerlin@linux.intel.com">lionel.g.landwerlin@linux.<wbr>intel.com</a>><br>
> Cc: Ville Syrjälä <<a href="mailto:ville.syrjala@linux.intel.com">ville.syrjala@linux.intel.com</a><wbr>><br>
> ---<br>
> drivers/gpu/drm/i915/i915_drv.<wbr>h | 1 +<br>
> drivers/gpu/drm/i915/i915_<wbr>perf.c | 31 ++++++++++++++++++++++--------<wbr>-<br>
> 2 files changed, 23 insertions(+), 9 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/i915/i915_<wbr>drv.h b/drivers/gpu/drm/i915/i915_<wbr>drv.h<br>
> index 3a22b6fd0ee6..48b07d706f06 100644<br>
> --- a/drivers/gpu/drm/i915/i915_<wbr>drv.h<br>
> +++ b/drivers/gpu/drm/i915/i915_<wbr>drv.h<br>
> @@ -2463,6 +2463,7 @@ struct drm_i915_private {<br>
><br>
> bool periodic;<br>
> int period_exponent;<br>
> + int timestamp_frequency;<br>
><br>
> int metrics_set;<br>
><br>
> diff --git a/drivers/gpu/drm/i915/i915_<wbr>perf.c b/drivers/gpu/drm/i915/i915_<wbr>perf.c<br>
> index 98eb6415b63a..980b4a1fd7cc 100644<br>
> --- a/drivers/gpu/drm/i915/i915_<wbr>perf.c<br>
> +++ b/drivers/gpu/drm/i915/i915_<wbr>perf.c<br>
> @@ -288,10 +288,12 @@ static u32 i915_perf_stream_paranoid = true;<br>
><br>
> /* For sysctl proc_dointvec_minmax of i915_oa_max_sample_rate<br>
> *<br>
> - * 160ns is the smallest sampling period we can theoretically program the OA<br>
> - * unit with on Haswell, corresponding to 6.25MHz.<br>
> + * The highest sampling frequency we can theoretically program the OA unit<br>
> + * with is always half the timestamp frequency: E.g. 6.25Mhz for Haswell.<br>
> + *<br>
> + * Initialized just before we register the sysctl parameter.<br>
> */<br>
> -static int oa_sample_rate_hard_limit = 6250000;<br>
> +static int oa_sample_rate_hard_limit;<br>
><br>
> /* Theoretically we can program the OA unit to sample every 160ns but don't<br>
> * allow that by default unless root...<br>
> @@ -2549,6 +2551,12 @@ i915_perf_open_ioctl_locked(<wbr>struct drm_i915_private *dev_priv,<br>
> return ret;<br>
> }<br>
><br>
> +static u64 oa_exponent_to_ns(struct drm_i915_private *dev_priv, int exponent)<br>
> +{<br>
> + return div_u64(1000000000ULL * (2ULL << exponent),<br>
> + dev_priv->perf.oa.timestamp_<wbr>frequency);<br>
> +}<br>
> +<br>
> /**<br>
> * read_properties_unlocked - validate + copy userspace stream open properties<br>
> * @dev_priv: i915 device instance<br>
> @@ -2647,14 +2655,9 @@ static int read_properties_unlocked(<wbr>struct drm_i915_private *dev_priv,<br>
> /* Theoretically we can program the OA unit to sample<br>
> * every 160ns but don't allow that by default unless<br>
</div></div>hmm, that's not actually true if we consider BXT, right?<br></blockquote><div><br></div><div>right, I've updated this comment now.<br><br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
Reviewed-by: Matthew Auld <<a href="mailto:matthew.auld@intel.com">matthew.auld@intel.com</a>><br>
</blockquote></div><br></div><div class="gmail_extra">thanks<br></div></div>