<div dir="ltr"> <div class="gmail_extra"> <div class="gmail_quote">On Wed, May 3, 2017 at 7:12 AM, Jani Nikula <<a href="mailto:jani.nikula@linux.intel.com" target="_blank" class="cremed">jani.nikula@linux.intel.com</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">On Tue, 18 Apr 2017, Puthikorn Voravootivat <<a href="mailto:puthik@chromium.org" class="cremed">puthik@chromium.org</a>> wrote: > Read desired PWM frequency from panel vbt and calculate the > value for divider in DPCD address 0x724 and 0x728 to match > that frequency as close as possible. > > Signed-off-by: Puthikorn Voravootivat <<a href="mailto:puthik@chromium.org" class="cremed">puthik@chromium.org</a>> > --- > drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 56 +++++++++++++++++++++++++++ > 1 file changed, 56 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c > index f99cf0a6ae44..9adc77bfb515 100644 > --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c > +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c > @@ -111,12 +111,60 @@ intel_dp_aux_set_dynamic_backlight_percent(struct intel_dp *intel_dp, > dbc, sizeof(dbc)); > } > > +/* > + * Set PWM Frequency divider to match desired frequency in vbt. > + * The PWM Frequency is calculated as 27Mhz / (F x P). > + * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the > + * EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h) > + * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the > + * EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h) > + */ > +static void intel_dp_aux_set_pwm_freq(struct intel_connector *connector) > +{ > + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); > + int freq, fxp, f; > + u8 pn, pn_min, pn_max; > + > + /* Find desired value of (F x P) > + * Note that, if F x P is out of supported range, the maximum value or > + * minimum value will applied automatically. So no need to check that. > + */ > + freq = dev_priv->vbt.backlight.pwm_freq_hz; > + fxp = DP_EDP_BACKLIGHT_FREQ_BASE / freq; > + > + /* Use lowest possible value of Pn to try to make F to be between 1 and > + * 255 while still in the range Pn_min and Pn_max > + */ > + if (!drm_dp_dpcd_readb(&intel_dp->aux, > + DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min)) { > + return; > + } > + if (!drm_dp_dpcd_readb(&intel_dp->aux, > + DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max)) { > + return; > + } > + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; > + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; > + f = fxp / (1 << pn_min); > + for (pn = pn_min; pn < pn_max && f > 255; pn++) </div></div>pn <= pn_max </blockquote><div>|pn < pn_max| is correct because if f is very high it is possible to get pn == pn_max+1 if we use |pn <= pn_max|</div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> > + f /= 2; > + > + /* Cap F to be in the range between 1 and 255. */ > + f = min(f, 255); > + f = max(f, 1); See clamp(). </blockquote><div>Will use this in next patch set.</div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> All in all the above is a rather complicated way to figure out how many bits you have to shift (F * P) right to fit it in 8 bits. Observe that F = (27 MHz / pwm_frew_hz) >> Pn.</blockquote><div>Agree that it is quite complicate way but I can't think of more simple way for this that still</div><div>won't get weird result if f is very high or very low. </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> BR, Jani. <div><div class="h5"> > + > + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT, pn); > + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_FREQ_SET, (u8) f); > +} > + > static void intel_dp_aux_enable_backlight(struct intel_connector *connector) > { > struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); > uint8_t dpcd_buf = 0; > uint8_t new_dpcd_buf = 0; > uint8_t edp_backlight_mode = 0; > + bool freq_cap; > > set_aux_backlight_enable(intel_dp, true); > > @@ -147,10 +195,18 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) > intel_dp_aux_set_dynamic_backlight_percent(intel_dp, 0, 100); > } > > + freq_cap = intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP; > + if (freq_cap) > + new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; > + > if (new_dpcd_buf != dpcd_buf) { > drm_dp_dpcd_writeb(&intel_dp->aux, > DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf); > } > + > + if (freq_cap) > + intel_dp_aux_set_pwm_freq(connector); > + > intel_dp_aux_set_backlight(connector, connector->panel.backlight.level); > } -- </div></div>Jani Nikula, Intel Open Source Technology Center </blockquote></div> </div></div>