<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Wed, May 10, 2017 at 5:39 PM, Pandiyan, Dhinakaran <span dir="ltr"><<a href="mailto:dhinakaran.pandiyan@intel.com" target="_blank" class="gmail-cremed cremed">dhinakaran.pandiyan@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><span class="gmail-">On Tue, 2017-05-09 at 16:40 -0700, Puthikorn Voravootivat wrote:<br>
> There are some panel that<br>
> (1) does not support display backlight enable via AUX<br>
> (2) support display backlight adjustment via AUX<br>
> (3) support display backlight enable via eDP BL_ENABLE pin<br>
><br>
> The current driver required that (1) must be support to enable (2).<br>
> This patch drops that requirement.<br>
><br>
> Signed-off-by: Puthikorn Voravootivat <<a href="mailto:puthik@chromium.org" class="gmail-cremed cremed">puthik@chromium.org</a>><br>
> ---<br>
> drivers/gpu/drm/i915/intel_dp_<wbr>aux_backlight.c | 5 ++++-<br>
> 1 file changed, 4 insertions(+), 1 deletion(-)<br>
><br>
> diff --git a/drivers/gpu/drm/i915/intel_<wbr>dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_<wbr>dp_aux_backlight.c<br>
> index 870c03fc0f3a..c22712762957 100644<br>
> --- a/drivers/gpu/drm/i915/intel_<wbr>dp_aux_backlight.c<br>
> +++ b/drivers/gpu/drm/i915/intel_<wbr>dp_aux_backlight.c<br>
> @@ -28,6 +28,10 @@ static void set_aux_backlight_enable(<wbr>struct intel_dp *intel_dp, bool enable)<br>
> {<br>
> uint8_t reg_val = 0;<br>
><br>
> + /* Early return when display use other mechanism to enable backlight. */<br>
> + if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_<wbr>CAP))<br>
> + return;<br>
<br>
</span>Won't DP_EDP_BACKLIGHT_AUX_ENABLE_<wbr>CAP be 1 always? The code below, in<br>
intel_dp_aux_display_control_<wbr>capable(), makes sure<br>
DP_EDP_BACKLIGHT_PIN_ENABLE_<wbr>CAP=0. The spec says at least one of these<br>
has to be 1.<br>
<br></blockquote><div>We will drop the DP_EDP_BACKLIGHT_PIN_ENABLE_<wbr>CAP != 0 check in next patch set.</div><div>This patch adds check here to prepare for that.</div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
<br>
"BACKLIGHT_AUX_ENABLE_CAPABLE<br>
1 = Indicates that the Sink device supports display backlight<br>
enable through the BACKLIGHT_ENABLE bit in the<br>
EDP_DISPLAY_CONTROL register (DPCD Address 00720h, bit 0).<br>
Must be set to 1 if the BACKLIGHT_PIN_ENABLE_CAPABLE bit (bit 1)<br>
is cleared to 0."<br>
<br>
-DK<br>
<div class="gmail-HOEnZb"><div class="gmail-h5"><br>
> +<br>
> if (drm_dp_dpcd_readb(&intel_dp-><wbr>aux, DP_EDP_DISPLAY_CONTROL_<wbr>REGISTER,<br>
> ®_val) < 0) {<br>
> DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",<br>
> @@ -164,7 +168,6 @@ intel_dp_aux_display_control_<wbr>capable(struct intel_connector *connector)<br>
> * the panel can support backlight control over the aux channel<br>
> */<br>
> if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_<wbr>ADJUSTMENT_CAP &&<br>
> - (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_<wbr>CAP) &&<br>
> (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_<wbr>AUX_SET_CAP) &&<br>
> !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_<wbr>CAP) ||<br>
> (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_<wbr>PWM_PIN_CAP))) {<br>
<br>
</div></div></blockquote></div><br></div></div>