<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:x="urn:schemas-microsoft-com:office:excel" xmlns:dt="uuid:C2F41010-65B3-11d1-A29F-00AA00C14882" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="blue" vlink="purple"> <div class="WordSection1"> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">To be clear, I believe right now, GVT-g architecture on upstream still only have one Virtualized DP monitor which will be on port B/D, but we have patches (not yet upstream) that have 3 virtualized DP monitors which will be attached to Port A/B/D. So we need to add this flexibility in the code so that it is not conflicted with eDP logic.<o:p></o:p></span></p> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p> <p class="MsoNormal"><a name="_MailEndCompose"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></a></p> <p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Anuar, Nuhairi <br> <b>Sent:</b> Wednesday, June 14, 2017 10:55 PM<br> <b>To:</b> Ville Syrjälä <ville.syrjala@linux.intel.com>; He, Min <min.he@intel.com><br> <b>Cc:</b> intel-gfx@lists.freedesktop.org; Mustaffa, Mustamin B <mustamin.b.mustaffa@intel.com><br> <b>Subject:</b> Re: [Intel-gfx] [PATCH] drm/i915: fix the issue DP-1 not working in guest<o:p></o:p></span></p> <p class="MsoNormal"><o:p> </o:p></p> <div> <div> <p class="MsoNormal">For a virtualized boot, it is possible for port A to be tied to DP. <o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">Min He any additional comment? <o:p></o:p></p> <div> <p class="MsoNormal"><o:p> </o:p></p> <div> <p class="MsoNormal">On Jun 14, 2017 9:38 PM, Ville Syrjälä <<a href="mailto:ville.syrjala@linux.intel.com">ville.syrjala@linux.intel.com</a>> wrote:<o:p></o:p></p> <blockquote style="border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in"> <div> <div> <p class="MsoNormal">On Wed, Jun 14, 2017 at 01:47:30PM +0800, Mustamin B Mustaffa wrote:<br> > From: "Anuar, Nuhairi" <<a href="mailto:nuhairi.anuar@intel.com">nuhairi.anuar@intel.com</a>><br> > <br> > In GVT guest, when port A is DP, i915 will force it as an EDP panel,<br> > which<br> > will cause DP-1 not working in GVT guest.<br> > This patch fixed this issue by check intel_vgpu_active() in<br> > intel_ddi_compute_config().<br> > <br> > Signed-off-by: Min He <<a href="mailto:min.he@intel.com">min.he@intel.com</a>><br> > Signed-off-by: Nuhairi Anuar <<a href="mailto:nuhairi.anuar@intel.com">nuhairi.anuar@intel.com</a>><br> > ---<br> > drivers/gpu/drm/i915/intel_ddi.c | 2 +-<br> > 1 file changed, 1 insertion(+), 1 deletion(-)<br> > <br> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c<br> > index 66b367d..1110cbc 100644<br> > --- a/drivers/gpu/drm/i915/intel_ddi.c<br> > +++ b/drivers/gpu/drm/i915/intel_ddi.c<br> > @@ -2069,7 +2069,7 @@ static bool intel_ddi_compute_config(struct intel_encoder *encoder,<br> > <br> > WARN(type == INTEL_OUTPUT_UNKNOWN, "compute_config() on unknown output!\n");<br> > <br> > - if (port == PORT_A)<br> > + if (port == PORT_A && !intel_vgpu_active(dev_priv))<br> > pipe_config->cpu_transcoder = TRANSCODER_EDP;<br> <br> And why exactly are you trying to register DP on port A?<br> <br> > <br> > if (type == INTEL_OUTPUT_HDMI)<br> > -- <br> > 1.9.1<br> > <br> > _______________________________________________<br> > Intel-gfx mailing list<br> > <a href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a><br> > <a href="https://lists.freedesktop.org/mailman/listinfo/intel-gfx">https://lists.freedesktop.org/mailman/listinfo/intel-gfx</a><br> <br> -- <br> Ville Syrjälä<br> Intel OTC<o:p></o:p></p> </div> </div> </blockquote> </div> <p class="MsoNormal"><o:p> </o:p></p> </div> </div> </div> </div> </body> </html>