<div><br><div class="gmail_quote"><div dir="auto">On Wed, Aug 16, 2017 at 11:51 PM Manasi Navare <<a href="mailto:manasi.d.navare@intel.com">manasi.d.navare@intel.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">In case of eDP because the panel has a fixed mode we cannot<br>
link train fallback and prune modes since this results in<br>
no modes available for eDP connector.</blockquote><div dir="auto"><br></div><div dir="auto">What about downclock modes?!</div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"></blockquote><div dir="auto"><br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><br>
Also since its a panel, link training should not fail dynamically<br>
based on cable conditions like in case of DP.</blockquote><div dir="auto"><br></div><div dir="auto">Is there any bug associated with this patch?</div><div dir="auto"><br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><br>
<br>
Cc: Jani Nikula <<a href="mailto:jani.nikula@linux.intel.com" target="_blank">jani.nikula@linux.intel.com</a>><br>
Cc: Jim Bride <<a href="mailto:jim.bride@linux.intel.com" target="_blank">jim.bride@linux.intel.com</a>><br>
Cc: Ville Syrjälä <<a href="mailto:ville.syrjala@linux.intel.com" target="_blank">ville.syrjala@linux.intel.com</a>><br>
Cc: Daniel Vetter <<a href="mailto:daniel.vetter@intel.com" target="_blank">daniel.vetter@intel.com</a>><br>
Signed-off-by: Manasi Navare <<a href="mailto:manasi.d.navare@intel.com" target="_blank">manasi.d.navare@intel.com</a>><br>
---<br>
drivers/gpu/drm/i915/intel_dp.c | 2 +-<br>
drivers/gpu/drm/i915/intel_dp_link_training.c | 3 ++-<br>
drivers/gpu/drm/i915/intel_drv.h | 1 +<br>
3 files changed, 4 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c<br>
index 4fd4853..edac0c8 100644<br>
--- a/drivers/gpu/drm/i915/intel_dp.c<br>
+++ b/drivers/gpu/drm/i915/intel_dp.c<br>
@@ -109,7 +109,7 @@ static const int default_rates[] = { 162000, 270000, 540000 };<br>
* If a CPU or PCH DP output is attached to an eDP panel, this function<br>
* will return true, and false otherwise.<br>
*/<br>
-static bool is_edp(struct intel_dp *intel_dp)<br>
+bool is_edp(struct intel_dp *intel_dp)<br>
{<br>
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);<br>
<br>
diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c<br>
index 05907fa..18ec61f 100644<br>
--- a/drivers/gpu/drm/i915/intel_dp_link_training.c<br>
+++ b/drivers/gpu/drm/i915/intel_dp_link_training.c<br>
@@ -332,7 +332,8 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)<br>
intel_connector-><a href="http://base.base.id" rel="noreferrer" target="_blank">base.base.id</a>,<br>
intel_connector-><a href="http://base.name" rel="noreferrer" target="_blank">base.name</a>,<br>
intel_dp->link_rate, intel_dp->lane_count);<br>
- if (!intel_dp_get_link_train_fallback_values(intel_dp,<br>
+ /* Dont fallback and prune modes if its eDP */<br>
+ if (!is_edp(intel_dp) && !intel_dp_get_link_train_fallback_values(intel_dp,<br>
intel_dp->link_rate,<br>
intel_dp->lane_count))<br>
/* Schedule a Hotplug Uevent to userspace to start modeset */<br>
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h<br>
index fa47285..9800a15 100644<br>
--- a/drivers/gpu/drm/i915/intel_drv.h<br>
+++ b/drivers/gpu/drm/i915/intel_drv.h<br>
@@ -1548,6 +1548,7 @@ static inline unsigned int intel_dp_unused_lane_mask(int lane_count)<br>
}<br>
<br>
bool intel_dp_read_dpcd(struct intel_dp *intel_dp);<br>
+bool is_edp(struct intel_dp *intel_dp);<br>
int intel_dp_link_required(int pixel_clock, int bpp);<br>
int intel_dp_max_data_rate(int max_link_clock, int max_lanes);<br>
bool intel_digital_port_connected(struct drm_i915_private *dev_priv,<br>
--<br>
2.1.4<br>
<br>
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</blockquote></div></div>