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<div class="moz-cite-prefix">On 9/27/2017 4:52 PM, Michal Wajdeczko
wrote:<br>
</div>
<blockquote type="cite"
cite="mid:20170927112252.27660-2-michal.wajdeczko@intel.com">
<pre wrap="">While here fix param and var types to match new naming rules.
v2: update names and commit message (Sagar)
Signed-off-by: Michal Wajdeczko <a class="moz-txt-link-rfc2396E" href="mailto:michal.wajdeczko@intel.com"><michal.wajdeczko@intel.com></a>
Cc: Sagar Arun Kamble <a class="moz-txt-link-rfc2396E" href="mailto:sagar.a.kamble@intel.com"><sagar.a.kamble@intel.com></a></pre>
</blockquote>
<tt>Reviewed-by: Sagar Arun Kamble </tt><tt><a
class="moz-txt-link-rfc2396E"
href="mailto:sagar.a.kamble@intel.com"><sagar.a.kamble@intel.com></a></tt><tt>
</tt>
<blockquote type="cite"
cite="mid:20170927112252.27660-2-michal.wajdeczko@intel.com">
<pre wrap="">
---
drivers/gpu/drm/i915/intel_guc_loader.c | 11 -----------
drivers/gpu/drm/i915/intel_uc.c | 4 ++--
drivers/gpu/drm/i915/intel_uc.h | 13 ++++++++++++-
3 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index c9e25be..387d105a 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -250,17 +250,6 @@ static int guc_ucode_xfer_dma(struct drm_i915_private *dev_priv,
return ret;
}
-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv)
-{
- u32 wopcm_size = GUC_WOPCM_TOP;
-
- /* On BXT, the top of WOPCM is reserved for RC6 context */
- if (IS_GEN9_LP(dev_priv))
- wopcm_size -= BXT_GUC_WOPCM_RC6_RESERVED;
-
- return wopcm_size;
-}
-
/*
* Load the GuC firmware blob into the MinuteIA.
*/
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 2774778..1ef2de6 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -188,7 +188,7 @@ static void fetch_uc_fw(struct drm_i915_private *dev_priv,
size = uc_fw->header_size + uc_fw->ucode_size;
/* Top 32k of WOPCM is reserved (8K stack + 24k RC6 context). */
- if (size > intel_guc_wopcm_size(dev_priv)) {
+ if (size > intel_guc_wopcm_size(&dev_priv->guc)) {
DRM_ERROR("Firmware is too large to fit in WOPCM\n");
goto fail;
}
@@ -374,7 +374,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
}
/* init WOPCM */
- I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv));
+ I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(guc));
I915_WRITE(DMA_GUC_WOPCM_OFFSET,
GUC_WOPCM_OFFSET_VALUE | HUC_LOADING_AGENT_GUC);
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 296c52d..f43bb43 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -63,6 +63,18 @@ static inline void intel_guc_notify(struct intel_guc *guc)
guc->notify(guc);
}
+static inline u32 intel_guc_wopcm_size(struct intel_guc *guc)
+{
+ struct drm_i915_private *i915 = guc_to_i915(guc);
+ u32 wopcm_size = GUC_WOPCM_TOP;
+
+ /* On BXT, the top of WOPCM is reserved for RC6 context */
+ if (IS_GEN9_LP(i915))
+ wopcm_size -= BXT_GUC_WOPCM_RC6_RESERVED;
+
+ return wopcm_size;
+}
+
static inline u32 guc_ggtt_offset(struct i915_vma *vma)
{
u32 offset = i915_ggtt_offset(vma);
@@ -90,7 +102,6 @@ int intel_guc_select_fw(struct intel_guc *guc);
int intel_guc_init_hw(struct intel_guc *guc);
int intel_guc_suspend(struct drm_i915_private *dev_priv);
int intel_guc_resume(struct drm_i915_private *dev_priv);
-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
/* i915_guc_submission.c */
int i915_guc_submission_init(struct drm_i915_private *dev_priv);
</pre>
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