<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> </head> <body dir="auto"> <div></div> <div> </div> <div> On Jan 4, 2018, at 10:07 PM, Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>> wrote: </div> <blockquote type="cite"> <div>On Thursday, January 4, 2018 4:41:35 PM PST Rodrigo Vivi wrote: <blockquote type="cite">On Thu, Jan 04, 2018 at 11:39:23PM +0000, Kenneth Graunke wrote: </blockquote> <blockquote type="cite"> <blockquote type="cite">On Thursday, January 4, 2018 1:23:06 PM PST Chris Wilson wrote: </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">Quoting Kenneth Graunke (2018-01-04 19:38:05) </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">Geminilake requires the 3D driver to select whether barriers are </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">intended for compute shaders, or tessellation control shaders, by </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">whacking a "Barrier Mode" bit in SLICE_COMMON_ECO_CHICKEN1 when </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">switching pipelines. Failure to do this properly can result in GPU </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">hangs. </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">Unfortunately, this means it needs to switch mid-batch, so only </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">userspace can properly set it. To facilitate this, the kernel needs </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">to whitelist the register. </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">Signed-off-by: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>> </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">Cc: <a href="mailto:stable@vger.kernel.org">stable@vger.kernel.org</a> </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">--- </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">drivers/gpu/drm/i915/i915_reg.h | 2 ++ </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++++ </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">2 files changed, 7 insertions(+) </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">Hello, </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">We unfortunately need to whitelist an extra register for GPU hang fix </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">on Geminilake. Here's the corresponding Mesa patch: </blockquote> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite"> </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">Thankfully it appears to be context saved. Has a w/a name been assigned </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">for this? </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> <blockquote type="cite">-Chris </blockquote> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite"> </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite">There doesn't appear to be one. The workaround page lists it, but there </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite">is no name. The register description has a note saying that you need to </blockquote> </blockquote> <blockquote type="cite"> <blockquote type="cite">set this, but doesn't call it out as a workaround. </blockquote> </blockquote> <blockquote type="cite"> </blockquote> <blockquote type="cite">It mentions only BXT:ALL, but not mention to GLK. </blockquote> <blockquote type="cite"> </blockquote> <blockquote type="cite">Should we add to both then? </blockquote> Well, that's irritating.</div> </blockquote> <div> </div> Indeed. As always :) <div> <blockquote type="cite"> <div> On the workarounds page, it does indeed say "BXT" with no mention of GLK. But the workaround text says to set "SLICE_COMMON_CHICKEN_ECO1 Barrier Mode [...] (bit 7 of MMIO 0x731C)." Looking at the register definition for SLICE_COMMON_ECO_CHICKEN1, bit 7 is "Barrier Mode" on [GLK] only, with no mention of BXT. It's marked reserved PBC on [SKL+, not GLK, not KBL]. On KBL it's something else. </div> </blockquote> <div> </div> <div>I have no ways to check this bit right now, </div> <div>But your explanation makes sense so I agree with you...</div> <div>Acked-by: Rodrigo Vivi <<a href="mailto:rodrigo.vivi@intel.com">rodrigo.vivi@intel.com</a>></div> <blockquote type="cite"> <div> I believe Mark saw hangs in tessellation control shader hangs on Geminilake only, and never saw this issue on Broxton. So, my guess is that the workaround really is new on Geminilake, and the BXT tag on the workarounds page is incorrect. (Mark, does that sound right to you?) </div> </blockquote> <div> </div> <div>Probably worth a mention on comment or commit msg?!</div> <blockquote type="cite"> <div> <blockquote type="cite"> <blockquote type="cite">That's why I put a generic comment, rather than the name. </blockquote> </blockquote> <blockquote type="cite"> </blockquote> <blockquote type="cite">On Display side we started using the row name for this case, to help </blockquote> <blockquote type="cite">easily finding this later. </blockquote> <blockquote type="cite"> </blockquote> <blockquote type="cite">ex: "Display WA #0390: skl,kbl" </blockquote> <blockquote type="cite"> </blockquote> <blockquote type="cite">The number for this apparently is: </blockquote> <blockquote type="cite">WA #0862 </blockquote> <blockquote type="cite"> </blockquote> <blockquote type="cite">Maybe we could use this one to start </blockquote> <blockquote type="cite">/* GT WA #0862: bxt,glk */ </blockquote> <blockquote type="cite"> </blockquote> <blockquote type="cite">GT? GEM? </blockquote> <blockquote type="cite">Unnamed WA #0862? </blockquote> Including #0862 seems like a good idea. I'm happy to change the comment to whatever you'd prefer. </div> </blockquote> <div> </div> <div>Leave your comment and add WA #0862...</div> <div>If later we define a standardized style we come back and change this.</div> <div> </div> <div>Thanks </div> <div>Rodrigo</div> <blockquote type="cite"> <div> --Ken </div> </blockquote> </div> </body> </html>