<div dir="ltr">Acked-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>> </div> <div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Wed, Aug 21, 2019 at 10:20 AM Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>> wrote: </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Wed, Aug 21, 2019 at 3:55 PM Ville Syrjälä <<a href="mailto:ville.syrjala@linux.intel.com" target="_blank">ville.syrjala@linux.intel.com</a>> wrote: > > On Tue, Aug 20, 2019 at 01:57:44PM -0700, Daniele Ceraolo Spurio wrote: > > > > > > On 8/20/19 12:54 PM, Daniel Vetter wrote: > > > The cpu (de)tiler hw is gone, this stopped being useful. Plus it never > > > supported any of the fancy new tiling formats, which means userspace > > > also stopped using the magic side-channel this provides. > > > > > > This would totally break a lot of the igts, but they're already broken > > > for the same reasons as userspace on gen12 would be. > > > > > > v2: Look at ggtt->num_fences instead, that also avoids the need for a > > > comment (Chris). This also means that gen12 support really needs to > > > make sure num_fences is set to 0. There is a patch for that, but it > > > checks for HAS_MAPPABLE_APERTURE, which I'm not sure is the right > > > thing really. Adding relevant people. > > > > > > > We'd obviously need to make that setting for all gen12+, because TGL > > does have mappable aperture. > > > > Apart from the tiling ioctl, the only place I see where we set tiling is > > intel_alloc_initial_plane_obj(), can the users of that object handle the > > lack of fences gracefully? > > Gen4+ display engine has its own tiling controls and doesn't care about > fences. So we should be able to leave the obj tiling set to NONE. > > Hmm. Actually I think we should reject tiled framebuffers in the BIOS > fb takeover because fbdev needs a linear view for the memory. No can > do without the fence. Yeah I think this is just more fallout from "no more fences in the hw". -Daniel > > > When I wrote the num_fences=0 patch I was > > expecting display to be unavailable, so I didn't really look at that > > part of the code. > > > > It'd also be nice to be more explicit with fencing since we seem to > > often call i915_vma_pin_iomap, which implicitly applies a fence if > > needed, on objects that can't be tiled or have had a fence assigned a > > few lines before. This is more a nice to have tough, possibly together > > with a split of the "mappable" and "fenceable" attributes of the vma. > > > > Daniele > > > > > Cc: Daniele Ceraolo Spurio <<a href="mailto:daniele.ceraolospurio@intel.com" target="_blank">daniele.ceraolospurio@intel.com</a>> > > > Cc: Stuart Summers <<a href="mailto:stuart.summers@intel.com" target="_blank">stuart.summers@intel.com</a>> > > > Cc: Matthew Auld <<a href="mailto:matthew.auld@intel.com" target="_blank">matthew.auld@intel.com</a>> > > > Cc: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org" target="_blank">kenneth@whitecape.org</a>> > > > Cc: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net" target="_blank">jason@jlekstrand.net</a>> > > > Cc: Chris Wilson <<a href="mailto:chris@chris-wilson.co.uk" target="_blank">chris@chris-wilson.co.uk</a>> > > > Cc: Lucas De Marchi <<a href="mailto:lucas.demarchi@intel.com" target="_blank">lucas.demarchi@intel.com</a>> > > > Signed-off-by: Daniel Vetter <<a href="mailto:daniel.vetter@intel.com" target="_blank">daniel.vetter@intel.com</a>> > > > --- > > > drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 7 +++++++ > > > 1 file changed, 7 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > > index ca0c2f451742..e5d1ae8d4dba 100644 > > > --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > > @@ -313,10 +313,14 @@ int > > > i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data, > > > struct drm_file *file) > > > { > > > + struct drm_i915_private *dev_priv = to_i915(dev); > > > struct drm_i915_gem_set_tiling *args = data; > > > struct drm_i915_gem_object *obj; > > > int err; > > > > > > + if (!dev_priv->ggtt.num_fences) > > > + return -EOPNOTSUPP; > > > + > > > obj = i915_gem_object_lookup(file, args->handle); > > > if (!obj) > > > return -ENOENT; > > > @@ -402,6 +406,9 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data, > > > struct drm_i915_gem_object *obj; > > > int err = -ENOENT; > > > > > > + if (!dev_priv->ggtt.num_fences) > > > + return -EOPNOTSUPP; > > > + > > > rcu_read_lock(); > > > obj = i915_gem_object_lookup_rcu(file, args->handle); > > > if (obj) { > > > > > _______________________________________________ > > Intel-gfx mailing list > > <a href="mailto:Intel-gfx@lists.freedesktop.org" target="_blank">Intel-gfx@lists.freedesktop.org</a> > > <a href="https://lists.freedesktop.org/mailman/listinfo/intel-gfx" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/intel-gfx</a> > > -- > Ville Syrjälä > Intel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - <a href="http://blog.ffwll.ch" rel="noreferrer" target="_blank">http://blog.ffwll.ch</a> _______________________________________________ Intel-gfx mailing list <a href="mailto:Intel-gfx@lists.freedesktop.org" target="_blank">Intel-gfx@lists.freedesktop.org</a> <a href="https://lists.freedesktop.org/mailman/listinfo/intel-gfx" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/intel-gfx</a></blockquote></div>