<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=UTF-8"> </head> <body text="#000000" bgcolor="#FFFFFF"> <div class="moz-cite-prefix">On 23/10/2019 19:12, Mika Kuoppala wrote: </div> <blockquote type="cite" cite="mid:87d0enl9ui.fsf@gaia.fi.intel.com"> <pre class="moz-quote-pre" wrap="">Tapani Pälli <a class="moz-txt-link-rfc2396E" href="mailto:tapani.palli@intel.com"><tapani.palli@intel.com></a> writes: </pre> <blockquote type="cite"> <pre class="moz-quote-pre" wrap="">As with commit 3fe0107e45ab, this change fixes multiple tests that are using the invocation counts. Documentation doesn't list the workaround for TGL but applying it fixes the tests. Signed-off-by: Tapani Pälli <a class="moz-txt-link-rfc2396E" href="mailto:tapani.palli@intel.com"><tapani.palli@intel.com></a> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index af8a8183154a..86ded203b2dd 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1215,6 +1215,26 @@ static void icl_whitelist_build(struct intel_engine_cs *engine) static void tgl_whitelist_build(struct intel_engine_cs *engine) { + struct i915_wa_list *w = &engine->whitelist; + + switch (engine->class) { + case RENDER_CLASS: + /* + * WaAllowPMDepthAndInvocationCountAccessFromUMD:tgl </pre> </blockquote> <pre class="moz-quote-pre" wrap=""> Tried to find info about this but failed.</pre> </blockquote> It probably got renamed, it started with CFL stepping C+ and wasn't listed for ICL. <span style="color: rgb(0, 0, 0); font-family: "helvetica neue", Helvetica, Arial, sans-serif; font-size: 16px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; text-decoration-style: initial; text-decoration-color: initial; display: inline !important; float: none;">¯\_(ツ)_/¯ -Lionel <blockquote type="cite" cite="mid:87d0enl9ui.fsf@gaia.fi.intel.com"> <pre class="moz-quote-pre" wrap=""> </pre> <blockquote type="cite"> <pre class="moz-quote-pre" wrap="">+ * + * This covers 4 registers which are next to one another : + * - PS_INVOCATION_COUNT + * - PS_INVOCATION_COUNT_UDW + * - PS_DEPTH_COUNT + * - PS_DEPTH_COUNT_UDW + */ + whitelist_reg_ext(w, PS_INVOCATION_COUNT, + RING_FORCE_TO_NONPRIV_ACCESS_RD | + RING_FORCE_TO_NONPRIV_RANGE_4); </pre> </blockquote> <pre class="moz-quote-pre" wrap=""> The register spec is identical with gen11 so ok to whitelist. Reviewed-by: Mika Kuoppala <a class="moz-txt-link-rfc2396E" href="mailto:mika.kuoppala@linux.intel.com"><mika.kuoppala@linux.intel.com></a> </pre> <blockquote type="cite"> <pre class="moz-quote-pre" wrap="">+ break; + default: + break; + } } void intel_engine_init_whitelist(struct intel_engine_cs *engine) -- 2.21.0 _______________________________________________ Intel-gfx mailing list <a class="moz-txt-link-abbreviated" href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a> <a class="moz-txt-link-freetext" href="https://lists.freedesktop.org/mailman/listinfo/intel-gfx">https://lists.freedesktop.org/mailman/listinfo/intel-gfx</a> </pre> </blockquote> <pre class="moz-quote-pre" wrap="">_______________________________________________ Intel-gfx mailing list <a class="moz-txt-link-abbreviated" href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a> <a class="moz-txt-link-freetext" href="https://lists.freedesktop.org/mailman/listinfo/intel-gfx">https://lists.freedesktop.org/mailman/listinfo/intel-gfx</a></pre> </blockquote> </body> </html>