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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>series starting with [01/56] drm/i915/gt: Restore ce->signal flush before releasing virtual engine</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/85294/">https://patchwork.freedesktop.org/series/85294/</a></td></tr>
<tr><td><b>State:</b></td><td>failure</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_9530 -> Patchwork_19220</h1>
<h2>Summary</h2>
<p><strong>FAILURE</strong></p>
<p>Serious unknown changes coming with Patchwork_19220 absolutely need to be<br />
verified manually.</p>
<p>If you think the reported changes have nothing to do with the changes<br />
introduced in Patchwork_19220, please notify your bug team to allow them<br />
to document this new failure mode, which will reduce false positives in CI.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/index.html</p>
<h2>Possible new issues</h2>
<p>Here are the unknown changes that may have been introduced in Patchwork_19220:</p>
<h3>IGT changes</h3>
<h4>Possible regressions</h4>
<ul>
<li>igt@i915_selftest@live@gtt:<ul>
<li>fi-bsw-n3050: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9530/fi-bsw-n3050/igt@i915_selftest@live@gtt.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-bsw-n3050/igt@i915_selftest@live@gtt.html">DMESG-WARN</a></li>
</ul>
</li>
</ul>
<h2>New tests</h2>
<p>New tests have been introduced between CI_DRM_9530 and Patchwork_19220:</p>
<h3>New IGT tests (1)</h3>
<ul>
<li>igt@i915_selftest@live@scheduler:<ul>
<li>Statuses : 34 pass(s)</li>
<li>Exec time: [0.67, 9.61] s</li>
</ul>
</li>
</ul>
<h2>Known issues</h2>
<p>Here are the changes found in Patchwork_19220 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>
<p>igt@gem_huc_copy@huc-copy:</p>
<ul>
<li>fi-byt-j1900: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-byt-j1900/igt@gem_huc_copy@huc-copy.html">SKIP</a> (<a href="https://bugs.freedesktop.org/show_bug.cgi?id=109271">fdo#109271</a>) +27 similar issues</li>
</ul>
</li>
<li>
<p>igt@i915_selftest@live@gem_contexts:</p>
<ul>
<li>fi-bsw-n3050: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9530/fi-bsw-n3050/igt@i915_selftest@live@gem_contexts.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-bsw-n3050/igt@i915_selftest@live@gem_contexts.html">INCOMPLETE</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2369">i915#2369</a>)</li>
</ul>
</li>
<li>
<p>igt@kms_chamelium@hdmi-crc-fast:</p>
<ul>
<li>fi-byt-j1900: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-byt-j1900/igt@kms_chamelium@hdmi-crc-fast.html">SKIP</a> (<a href="https://bugs.freedesktop.org/show_bug.cgi?id=109271">fdo#109271</a> / <a href="https://bugs.freedesktop.org/show_bug.cgi?id=111827">fdo#111827</a>) +8 similar issues</li>
</ul>
</li>
<li>
<p>igt@prime_self_import@basic-with_one_bo_two_files:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9530/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>)</li>
</ul>
</li>
<li>
<p>igt@runner@aborted:</p>
<ul>
<li>fi-bsw-n3050: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-bsw-n3050/igt@runner@aborted.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1436">i915#1436</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/483">i915#483</a>)</li>
</ul>
</li>
</ul>
<h4>Possible fixes</h4>
<ul>
<li>
<p>igt@gem_exec_suspend@basic-s3:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9530/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2411">i915#2411</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html">PASS</a></li>
</ul>
</li>
<li>
<p>igt@i915_selftest@live@gt_heartbeat:</p>
<ul>
<li>fi-bsw-nick: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9530/fi-bsw-nick/igt@i915_selftest@live@gt_heartbeat.html">DMESG-FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2675">i915#2675</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/541">i915#541</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-bsw-nick/igt@i915_selftest@live@gt_heartbeat.html">PASS</a></li>
</ul>
</li>
<li>
<p>igt@prime_vgem@basic-userptr:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9530/fi-tgl-y/igt@prime_vgem@basic-userptr.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19220/fi-tgl-y/igt@prime_vgem@basic-userptr.html">PASS</a> +1 similar issue</li>
</ul>
</li>
</ul>
<h2>Participating hosts (39 -> 38)</h2>
<p>Additional (1): fi-byt-j1900 <br />
Missing (2): fi-bsw-cyan fi-bdw-samus </p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_9530 -> Patchwork_19220</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_9530: 4b094e30c7d79e59faef5ce793d6ebbcdbede5a2 @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_5926: c81567cf1c05050f7becd4d78ebe349dfb2f9520 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools<br />
Patchwork_19220: e89b9a4f59ca38398a238fd9523af2710945bd23 @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<p>== Linux commits ==</p>
<p>e89b9a4f59ca drm/i915/gt: Limit C-states while waiting for requests<br />
633bc777ab49 drm/i915/gt: Enable ring scheduling for gen6/7<br />
16247b692dd4 drm/i915/gt: Implement ring scheduler for gen6/7<br />
a326b4b56178 drm/i915/gt: Enable busy-stats for ring-scheduler<br />
0ca0db3206f9 drm/i915/gt: Infrastructure for ring scheduling<br />
d23d8470fe37 drm/i915/gt: Use client timeline address for seqno writes<br />
2f3a563d0c64 drm/i915/gt: Support creation of 'internal' rings<br />
c92ce77adff2 drm/i915/gt: Couple tasklet scheduling for all CS interrupts<br />
4dd9da9947ea Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"<br />
92e978ab04b4 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines<br />
3745e1be3ac7 drm/i915/selftests: Exercise relative timeline modes<br />
0f154e95943a drm/i915/gt: Use indices for writing into relative timelines<br />
d3fc994ef822 drm/i915/gt: Add timeline "mode"<br />
2d030b16c499 drm/i915/gt: Track timeline GGTT offset separately from subpage offset<br />
92bb940c953e drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb<br />
c075709f4766 drm/i915: Bump default timeslicing quantum to 5ms<br />
8e5ab6362632 drm/i915: Move saturated workload detection back to the context<br />
c1d3e8da3441 drm/i915/gt: Support virtual engine queues<br />
2fc331d15f56 drm/i915: Extend the priority boosting for the display with a deadline<br />
3a61917c28fa drm/i915/gt: Specify a deadline for the heartbeat<br />
cf1ea11d4f9f drm/i915: Fair low-latency scheduling<br />
513af0b3e8c7 drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper<br />
1c7ec2edd9ef drm/i915: Replace priolist rbtree with a skiplist<br />
cd4ba685c265 drm/i915: Move tasklet from execlists to sched<br />
c5bd056345df drm/i915: Move scheduler queue<br />
0500494008c6 drm/i915: Move common active lists from engine to i915_scheduler<br />
c9548999367a drm/i915: Fix the iterative dfs for defering requests<br />
7ee390647b0c drm/i915: Extract the ability to defer and rerun a request later<br />
f5765931129f drm/i915: Extract request suspension from the execlists backend<br />
0985b4fb1bbc drm/i915: Extract request rewinding from execlists<br />
df9a037a9db9 drm/i915: Extract request submission from execlists<br />
d1bcccf864ff drm/i915: Improve DFS for priority inheritance<br />
fa0560675867 drm/i915/selftests: Exercise priority inheritance around an engine loop<br />
1e1b4d8257b8 drm/i915/selftests: Measure set-priority duration<br />
65ec8303e7be drm/i915: Restructure priority inheritance<br />
633b60d3ab4a drm/i915: Teach the i915_dependency to use a double-lock<br />
ab7543b6a53b drm/i915: Replace engine->schedule() with a known request operation<br />
3e9b37304663 drm/i915: Remove I915_USER_PRIORITY_SHIFT<br />
f2dd5e0bd198 drm/i915: Strip out internal priorities<br />
1416d1c632b4 drm/i915/gt: Skip over completed active execlists, again<br />
5290a2049e43 drm/i915/gt: Remove timeslice suppression<br />
5ee474627f5c drm/i915/gt: Do not suspend bonded requests if one hangs<br />
a1db817adb4f drm/i915/gt: Convert stats.active to plain unsigned int<br />
5b4b4f36ae61 drm/i915/gt: Extract busy-stats for ring-scheduler<br />
c4ed88ca7714 drm/i915/gt: Drop atomic for engine->fw_active tracking<br />
3348d18ca3ea drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()<br />
37f7bcca5bf7 drm/i915/gem: Reduce ctx->engines_mutex for get_engines()<br />
f92a7ed45c5b drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source<br />
34d4b5110ba9 drm/i915: Drop i915_request.lock requirement for intel_rps_boost()<br />
376a3fd1aa70 drm/i915: Drop i915_request.lock serialisation around await_start<br />
9b223bba4489 drm/i915: Mark up protected uses of 'i915_request_completed'<br />
16d47e1aed72 drm/i915/gem: Peek at the inflight context<br />
d39c3dc09659 drm/i915/gt: Pull context closure check from request submit to schedule-in<br />
b23f3eb56bd4 drm/i915/gt: Cancel submitted requests upon context reset<br />
08fea6cdbfe1 drm/i915/gt: Only retire on the last breadcrumb if the last request<br />
5d253c820f98 drm/i915/gt: Restore ce->signal flush before releasing virtual engine</p>
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