<div>hi all</div><div>excuse me ，could the kernel support 8k60 dsc function？</div><div> </div><div></div><div><div style="font-size:12px;padding:2px 0;">---Original---</div><div style="font-size:12px;background:#f0f0f0;color:#212121;padding:8px!important;border-radius:4px;line-height:1.5;"><div>From: "intel-gfx-request"<intel-gfx-request@lists.freedesktop.org></div><div>Date: Tue, Apr 27, 2021 17:32 PM</div><div>To: "intel-gfx"<intel-gfx@lists.freedesktop.org>;</div><div>Subject: Intel-gfx Digest, Vol 159, Issue 337</div></div> Send Intel-gfx mailing list submissions to intel-gfx@lists.freedesktop.org To subscribe or unsubscribe via the World Wide Web, visit https://lists.freedesktop.org/mailman/listinfo/intel-gfx or, via email, send a message with subject or body 'help' to intel-gfx-request@lists.freedesktop.org You can reach the person managing the list at intel-gfx-owner@lists.freedesktop.org When replying, please edit your Subject line so it is more specific than "Re: Contents of Intel-gfx digest..." Today's Topics: 1. [PATCH 8/8] drm/modifiers: Enforce consistency between the cap an IN_FORMATS (Daniel Vetter) 2. ? Fi.CI.CHECKPATCH: warning for series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object (Patchwork) 3. ? Fi.CI.SPARSE: warning for series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object (Patchwork) 4. Re: [PATCH 8/8] drm/modifiers: Enforce consistency between the cap an IN_FORMATS (Simon Ser) 5. Re: [PATCH 01/21] drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE (Daniel Vetter) ---------------------------------------------------------------------- Message: 1 Date: Tue, 27 Apr 2021 11:20:18 +0200 From: Daniel Vetter <daniel.vetter@ffwll.ch> To: DRI Development <dri-devel@lists.freedesktop.org> Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>, Daniel Vetter <daniel.vetter@ffwll.ch>, Maxime Ripard <maxime@cerno.tech>, Simon Ser <contact@emersion.fr>, Lucas Stach <l.stach@pengutronix.de>, Pekka Paalanen <pekka.paalanen@collabora.com>, Daniel Vetter <daniel.vetter@intel.com>, Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Maxime Ripard <mripard@kernel.org>, Thomas Zimmermann <tzimmermann@suse.de>, David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch> Subject: [Intel-gfx] [PATCH 8/8] drm/modifiers: Enforce consistency between the cap an IN_FORMATS Message-ID: <20210427092018.832258-8-daniel.vetter@ffwll.ch> It's very confusing for userspace to have to deal with inconsistencies here, and some drivers screwed this up a bit. Most just ommitted the format list when they meant to say that only linear modifier is allowed, but some also meant that only implied modifiers are acceptable (because actually none of the planes registered supported modifiers). Now that this is all done consistently across all drivers, document the rules and enforce it in the drm core. v2: - Make the capability a link (Simon) - Note that all is lost before 5.1. Acked-by: Maxime Ripard <maxime@cerno.tech> Cc: Simon Ser <contact@emersion.fr> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Pekka Paalanen <pekka.paalanen@collabora.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> --- drivers/gpu/drm/drm_plane.c | 18 +++++++++++++++++- include/drm/drm_mode_config.h | 2 ++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index 0dd43882fe7c..20c7a1665414 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -128,6 +128,13 @@ * pairs supported by this plane. The blob is a struct * drm_format_modifier_blob. Without this property the plane doesn't * support buffers with modifiers. Userspace cannot change this property. + * + * Note that userspace can check the &DRM_CAP_ADDFB2_MODIFIERS driver + * capability for general modifier support. If this flag is set then every + * plane will have the IN_FORMATS property, even when it only supports + * DRM_FORMAT_MOD_LINEAR. Before linux kernel release v5.1 there have been + * various bugs in this area with inconsistencies between the capability + * flag and per-plane properties. */ static unsigned int drm_num_planes(struct drm_device *dev) @@ -277,8 +284,14 @@ static int __drm_universal_plane_init(struct drm_device *dev, format_modifier_count++; } - if (format_modifier_count) + /* autoset the cap and check for consistency across all planes */ + if (format_modifier_count) { + WARN_ON(!config->allow_fb_modifiers && + !list_empty(&config->plane_list)); config->allow_fb_modifiers = true; + } else { + WARN_ON(config->allow_fb_modifiers); + } plane->modifier_count = format_modifier_count; plane->modifiers = kmalloc_array(format_modifier_count, @@ -360,6 +373,9 @@ static int __drm_universal_plane_init(struct drm_device *dev, * drm_universal_plane_init() to let the DRM managed resource infrastructure * take care of cleanup and deallocation. * + * Drivers supporting modifiers must set @format_modifiers on all their planes, + * even those that only support DRM_FORMAT_MOD_LINEAR. + * * Returns: * Zero on success, error code on failure. */ diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index ab424ddd7665..1ddf7783fdf7 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -909,6 +909,8 @@ struct drm_mode_config { * @allow_fb_modifiers: * * Whether the driver supports fb modifiers in the ADDFB2.1 ioctl call. + * Note that drivers should not set this directly, it is automatically + * set in drm_universal_plane_init(). * * IMPORTANT: * -- 2.31.0 ------------------------------ Message: 2 Date: Tue, 27 Apr 2021 09:20:33 -0000 From: Patchwork <patchwork@emeril.freedesktop.org> To: "Matthew Auld" <matthew.auld@intel.com> Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] ? Fi.CI.CHECKPATCH: warning for series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object Message-ID: <161951523391.17488.82611456932237000@emeril.freedesktop.org> Content-Type: text/plain; charset="utf-8" == Series Details == Series: series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object URL : https://patchwork.freedesktop.org/series/89529/ State : warning == Summary == $ dim checkpatch origin/drm-tip c40331cdc349 drm/i915/dg1: Fix mapping type for default state object 6170c13d83ab drm/i915: Update the helper to set correct mapping -:56: CHECK:BRACES: Unbalanced braces around else statement #56: FILE: drivers/gpu/drm/i915/gt/intel_ring.c:56: + else { total: 0 errors, 0 warnings, 1 checks, 123 lines checked f501307a51b0 drm/i915/gtt: map the PD up front 81f1a39eb04c drm/i915/gtt/dgfx: place the PD in LMEM 87f851fc9c27 drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete 4c20b10e9301 drm/i915/lmem: Bypass aperture when lmem is available e85d70bf7f2a drm/i915: Return error value when bo not in LMEM for discrete ------------------------------ Message: 3 Date: Tue, 27 Apr 2021 09:22:05 -0000 From: Patchwork <patchwork@emeril.freedesktop.org> To: "Matthew Auld" <matthew.auld@intel.com> Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] ? Fi.CI.SPARSE: warning for series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object Message-ID: <161951532582.17486.7682258024528021280@emeril.freedesktop.org> Content-Type: text/plain; charset="utf-8" == Series Details == Series: series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object URL : https://patchwork.freedesktop.org/series/89529/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_reset.c:1329:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +drivers/gpu/drm/i915/gt/intel_ring_submission.c:1203:24: warning: Using plain integer as NULL pointer +drivers/gpu/drm/i915/gvt/mmio.c:295:23: warning: memcpy with byte count of 279040 +drivers/gpu/drm/i915/i915_perf.c:1434:15: warning: memset with byte count of 16777216 +drivers/gpu/drm/i915/i915_perf.c:1488:15: warning: memset with byte count of 16777216 +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block ------------------------------ Message: 4 Date: Tue, 27 Apr 2021 09:30:00 +0000 From: Simon Ser <contact@emersion.fr> To: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: DRI Development <dri-devel@lists.freedesktop.org>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>, Maxime Ripard <maxime@cerno.tech>, Lucas Stach <l.stach@pengutronix.de>, Pekka Paalanen <pekka.paalanen@collabora.com>, Daniel Vetter <daniel.vetter@intel.com>, Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Maxime Ripard <mripard@kernel.org>, Thomas Zimmermann <tzimmermann@suse.de>, David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch> Subject: Re: [Intel-gfx] [PATCH 8/8] drm/modifiers: Enforce consistency between the cap an IN_FORMATS Message-ID: <uqljuuwh-zemmi8gabpwazelgf0oe7xchfjpptax2trgkjsxkjur_ydoxppwrt2kqsn2-is1eqwrkoaazi__l4d5frpolywu4n2zxufsb78=@emersion.fr> Content-Type: text/plain; charset=utf-8 Reviewed-by: Simon Ser <contact@emersion.fr> ------------------------------ Message: 5 Date: Tue, 27 Apr 2021 11:32:48 +0200 From: Daniel Vetter <daniel@ffwll.ch> To: Jason Ekstrand <jason@jlekstrand.net> Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 01/21] drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE Message-ID: <yifaqjezdihlj30d@phenom.ffwll.local> Content-Type: text/plain; charset=iso-8859-1 On Fri, Apr 23, 2021 at 05:31:11PM -0500, Jason Ekstrand wrote: > This reverts commit 88be76cdafc7 ("drm/i915: Allow userspace to specify > ringsize on construction"). This API was originally added for OpenCL > but the compute-runtime PR has sat open for a year without action so we > can still pull it out if we want. I argue we should drop it for three > reasons: > > 1. If the compute-runtime PR has sat open for a year, this clearly > isn't that important. > > 2. It's a very leaky API. Ring size is an implementation detail of the > current execlist scheduler and really only makes sense there. It > can't apply to the older ring-buffer scheduler on pre-execlist > hardware because that's shared across all contexts and it won't > apply to the GuC scheduler that's in the pipeline. > > 3. Having userspace set a ring size in bytes is a bad solution to the > problem of having too small a ring. There is no way that userspace > has the information to know how to properly set the ring size so > it's just going to detect the feature and always set it to the > maximum of 512K. This is what the compute-runtime PR does. The > scheduler in i915, on the other hand, does have the information to > make an informed choice. It could detect if the ring size is a > problem and grow it itself. Or, if that's too hard, we could just > increase the default size from 16K to 32K or even 64K instead of > relying on userspace to do it. > > Let's drop this API for now and, if someone decides they really care > about solving this problem, they can do it properly. > > Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Two things: - I'm assuming you have an igt change to make sure we get EINVAL for both set and getparam now? Just to make sure. - intel_context->ring is either a ring pointer when CONTEXT_ALLOC_BIT is set in ce->flags, or the size of the ring stored in the pointer if not. I'm seriously hoping you get rid of this complexity with your proto-context series, and also delete __intel_context_ring_size() in the end. That function has no business existing imo. If not, please make sure that's the case. Aside from these patch looks good. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> > --- > drivers/gpu/drm/i915/Makefile | 1 - > drivers/gpu/drm/i915/gem/i915_gem_context.c | 85 +------------------ > drivers/gpu/drm/i915/gt/intel_context_param.c | 63 -------------- > drivers/gpu/drm/i915/gt/intel_context_param.h | 3 - > include/uapi/drm/i915_drm.h | 20 +---- > 5 files changed, 4 insertions(+), 168 deletions(-) > delete mode 100644 drivers/gpu/drm/i915/gt/intel_context_param.c > > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile > index d0d936d9137bc..afa22338fa343 100644 > --- a/drivers/gpu/drm/i915/Makefile > +++ b/drivers/gpu/drm/i915/Makefile > @@ -88,7 +88,6 @@ gt-y += \ > gt/gen8_ppgtt.o \ > gt/intel_breadcrumbs.o \ > gt/intel_context.o \ > - gt/intel_context_param.o \ > gt/intel_context_sseu.o \ > gt/intel_engine_cs.o \ > gt/intel_engine_heartbeat.o \ > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c > index fd8ee52e17a47..e52b85b8f923d 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > @@ -1335,63 +1335,6 @@ static int set_ppgtt(struct drm_i915_file_private *file_priv, > return err; > } > > -static int __apply_ringsize(struct intel_context *ce, void *sz) > -{ > - return intel_context_set_ring_size(ce, (unsigned long)sz); > -} > - > -static int set_ringsize(struct i915_gem_context *ctx, > - struct drm_i915_gem_context_param *args) > -{ > - if (!HAS_LOGICAL_RING_CONTEXTS(ctx->i915)) > - return -ENODEV; > - > - if (args->size) > - return -EINVAL; > - > - if (!IS_ALIGNED(args->value, I915_GTT_PAGE_SIZE)) > - return -EINVAL; > - > - if (args->value < I915_GTT_PAGE_SIZE) > - return -EINVAL; > - > - if (args->value > 128 * I915_GTT_PAGE_SIZE) > - return -EINVAL; > - > - return context_apply_all(ctx, > - __apply_ringsize, > - __intel_context_ring_size(args->value)); > -} > - > -static int __get_ringsize(struct intel_context *ce, void *arg) > -{ > - long sz; > - > - sz = intel_context_get_ring_size(ce); > - GEM_BUG_ON(sz > INT_MAX); > - > - return sz; /* stop on first engine */ > -} > - > -static int get_ringsize(struct i915_gem_context *ctx, > - struct drm_i915_gem_context_param *args) > -{ > - int sz; > - > - if (!HAS_LOGICAL_RING_CONTEXTS(ctx->i915)) > - return -ENODEV; > - > - if (args->size) > - return -EINVAL; > - > - sz = context_apply_all(ctx, __get_ringsize, NULL); > - if (sz < 0) > - return sz; > - > - args->value = sz; > - return 0; > -} > - > int > i915_gem_user_to_context_sseu(struct intel_gt *gt, > const struct drm_i915_gem_context_param_sseu *user, > @@ -2037,11 +1980,8 @@ static int ctx_setparam(struct drm_i915_file_private *fpriv, > ret = set_persistence(ctx, args); > break; > > - case I915_CONTEXT_PARAM_RINGSIZE: > - ret = set_ringsize(ctx, args); > - break; > - > case I915_CONTEXT_PARAM_BAN_PERIOD: > + case I915_CONTEXT_PARAM_RINGSIZE: > default: > ret = -EINVAL; > break; > @@ -2069,18 +2009,6 @@ static int create_setparam(struct i915_user_extension __user *ext, void *data) > return ctx_setparam(arg->fpriv, arg->ctx, &local.param); > } > > -static int copy_ring_size(struct intel_context *dst, > - struct intel_context *src) > -{ > - long sz; > - > - sz = intel_context_get_ring_size(src); > - if (sz < 0) > - return sz; > - > - return intel_context_set_ring_size(dst, sz); > -} > - > static int clone_engines(struct i915_gem_context *dst, > struct i915_gem_context *src) > { > @@ -2125,12 +2053,6 @@ static int clone_engines(struct i915_gem_context *dst, > } > > intel_context_set_gem(clone->engines[n], dst); > - > - /* Copy across the preferred ringsize */ > - if (copy_ring_size(clone->engines[n], e->engines[n])) { > - __free_engines(clone, n + 1); > - goto err_unlock; > - } > } > clone->num_engines = n; > i915_sw_fence_complete(&e->fence); > @@ -2490,11 +2412,8 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data, > args->value = i915_gem_context_is_persistent(ctx); > break; > > - case I915_CONTEXT_PARAM_RINGSIZE: > - ret = get_ringsize(ctx, args); > - break; > - > case I915_CONTEXT_PARAM_BAN_PERIOD: > + case I915_CONTEXT_PARAM_RINGSIZE: > default: > ret = -EINVAL; > break; > diff --git a/drivers/gpu/drm/i915/gt/intel_context_param.c b/drivers/gpu/drm/i915/gt/intel_context_param.c > deleted file mode 100644 > index 65dcd090245d6..0000000000000 > --- a/drivers/gpu/drm/i915/gt/intel_context_param.c > +++ /dev/null > @@ -1,63 +0,0 @@ > -// SPDX-License-Identifier: MIT > -/* > - * Copyright ? 2019 Intel Corporation > - */ > - > -#include "i915_active.h" > -#include "intel_context.h" > -#include "intel_context_param.h" > -#include "intel_ring.h" > - > -int intel_context_set_ring_size(struct intel_context *ce, long sz) > -{ > - int err; > - > - if (intel_context_lock_pinned(ce)) > - return -EINTR; > - > - err = i915_active_wait(&ce->active); > - if (err < 0) > - goto unlock; > - > - if (intel_context_is_pinned(ce)) { > - err = -EBUSY; /* In active use, come back later! */ > - goto unlock; > - } > - > - if (test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) { > - struct intel_ring *ring; > - > - /* Replace the existing ringbuffer */ > - ring = intel_engine_create_ring(ce->engine, sz); > - if (IS_ERR(ring)) { > - err = PTR_ERR(ring); > - goto unlock; > - } > - > - intel_ring_put(ce->ring); > - ce->ring = ring; > - > - /* Context image will be updated on next pin */ > - } else { > - ce->ring = __intel_context_ring_size(sz); > - } > - > -unlock: > - intel_context_unlock_pinned(ce); > - return err; > -} > - > -long intel_context_get_ring_size(struct intel_context *ce) > -{ > - long sz = (unsigned long)READ_ONCE(ce->ring); > - > - if (test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) { > - if (intel_context_lock_pinned(ce)) > - return -EINTR; > - > - sz = ce->ring->size; > - intel_context_unlock_pinned(ce); > - } > - > - return sz; > -} > diff --git a/drivers/gpu/drm/i915/gt/intel_context_param.h b/drivers/gpu/drm/i915/gt/intel_context_param.h > index 3ecacc675f414..dffedd983693d 100644 > --- a/drivers/gpu/drm/i915/gt/intel_context_param.h > +++ b/drivers/gpu/drm/i915/gt/intel_context_param.h > @@ -10,9 +10,6 @@ > > #include "intel_context.h" > > -int intel_context_set_ring_size(struct intel_context *ce, long sz); > -long intel_context_get_ring_size(struct intel_context *ce); > - > static inline int > intel_context_set_watchdog_us(struct intel_context *ce, u64 timeout_us) > { > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h > index 6a34243a7646a..6eefbc6dec01f 100644 > --- a/include/uapi/drm/i915_drm.h > +++ b/include/uapi/drm/i915_drm.h > @@ -1721,24 +1721,8 @@ struct drm_i915_gem_context_param { > */ > #define I915_CONTEXT_PARAM_PERSISTENCE 0xb > > -/* > - * I915_CONTEXT_PARAM_RINGSIZE: > - * > - * Sets the size of the CS ringbuffer to use for logical ring contexts. This > - * applies a limit of how many batches can be queued to HW before the caller > - * is blocked due to lack of space for more commands. > - * > - * Only reliably possible to be set prior to first use, i.e. during > - * construction. At any later point, the current execution must be flushed as > - * the ring can only be changed while the context is idle. Note, the ringsize > - * can be specified as a constructor property, see > - * I915_CONTEXT_CREATE_EXT_SETPARAM, but can also be set later if required. > - * > - * Only applies to the current set of engine and lost when those engines > - * are replaced by a new mapping (see I915_CONTEXT_PARAM_ENGINES). > - * > - * Must be between 4 - 512 KiB, in intervals of page size [4 KiB]. > - * Default is 16 KiB. > +/* This API has been removed. On the off chance someone somewhere has > + * attempted to use it, never re-use this context param number. > */ > #define I915_CONTEXT_PARAM_RINGSIZE 0xc > /* Must be kept compact -- no holes and well documented */ > -- > 2.31.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ------------------------------ Subject: Digest Footer _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ------------------------------ End of Intel-gfx Digest, Vol 159, Issue 337 ******************************************* </daniel.vetter@ffwll.ch></jason@jlekstrand.net></yifaqjezdihlj30d@phenom.ffwll.local></jason@jlekstrand.net></daniel@ffwll.ch></contact@emersion.fr></uqljuuwh-zemmi8gabpwazelgf0oe7xchfjpptax2trgkjsxkjur_ydoxppwrt2kqsn2-is1eqwrkoaazi__l4d5frpolywu4n2zxufsb78=@emersion.fr></daniel@ffwll.ch></airlied@linux.ie></tzimmermann@suse.de></mripard@kernel.org></maarten.lankhorst@linux.intel.com></daniel.vetter@intel.com></pekka.paalanen@collabora.com></l.stach@pengutronix.de></maxime@cerno.tech></intel-gfx@lists.freedesktop.org></dri-devel@lists.freedesktop.org></daniel.vetter@ffwll.ch></contact@emersion.fr></matthew.auld@intel.com></patchwork@emeril.freedesktop.org></matthew.auld@intel.com></patchwork@emeril.freedesktop.org></daniel@ffwll.ch></airlied@linux.ie></tzimmermann@suse.de></mripard@kernel.org></maarten.lankhorst@linux.intel.com></daniel.vetter@intel.com></pekka.paalanen@collabora.com></l.stach@pengutronix.de></contact@emersion.fr></maxime@cerno.tech></daniel@ffwll.ch></airlied@linux.ie></tzimmermann@suse.de></mripard@kernel.org></maarten.lankhorst@linux.intel.com></daniel.vetter@intel.com></pekka.paalanen@collabora.com></l.stach@pengutronix.de></contact@emersion.fr></maxime@cerno.tech></daniel.vetter@ffwll.ch></intel-gfx@lists.freedesktop.org></dri-devel@lists.freedesktop.org></daniel.vetter@ffwll.ch></div>