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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>drm/i915/dp: dp 2.0 enabling prep work</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/93800/">https://patchwork.freedesktop.org/series/93800/</a></td></tr>
<tr><td><b>State:</b></td><td>success</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20850/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20850/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_10497 -> Patchwork_20850</h1>
<h2>Summary</h2>
<p><strong>SUCCESS</strong></p>
<p>No regressions found.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20850/index.html</p>
<h2>Known issues</h2>
<p>Here are the changes found in Patchwork_20850 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>
<p>igt@amdgpu/amd_basic@cs-gfx:</p>
<ul>
<li>
<p>fi-rkl-guc: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20850/fi-rkl-guc/igt@amdgpu/amd_basic@cs-gfx.html">SKIP</a> (<a href="https://bugs.freedesktop.org/show_bug.cgi?id=109315">fdo#109315</a>) +17 similar issues</p>
</li>
<li>
<p>fi-kbl-soraka: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20850/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html">SKIP</a> (<a href="https://bugs.freedesktop.org/show_bug.cgi?id=109271">fdo#109271</a>) +6 similar issues</p>
</li>
</ul>
</li>
<li>
<p>igt@runner@aborted:</p>
<ul>
<li>fi-bdw-5557u: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20850/fi-bdw-5557u/igt@runner@aborted.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1602">i915#1602</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/2029">i915#2029</a>)</li>
</ul>
</li>
</ul>
<h4>Possible fixes</h4>
<ul>
<li>igt@core_hotunplug@unbind-rebind:<ul>
<li>fi-rkl-guc: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10497/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/3925">i915#3925</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20850/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html">PASS</a></li>
</ul>
</li>
</ul>
<h4>Warnings</h4>
<ul>
<li>igt@i915_pm_rpm@basic-rte:<ul>
<li>fi-kbl-guc: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10497/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/579">i915#579</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20850/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html">SKIP</a> (<a href="https://bugs.freedesktop.org/show_bug.cgi?id=109271">fdo#109271</a>)</li>
</ul>
</li>
</ul>
<h2>Participating hosts (34 -> 33)</h2>
<p>Missing (1): fi-bsw-cyan </p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_10497 -> Patchwork_20850</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_10497: c50a8ea72915f1e3972d011690a423bafbee7a58 @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_6178: 146260200f9a6d4536e48a195e2ab49a07d4f0c1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git<br />
Patchwork_20850: f619e6bfa217e2f33dfb31e0da1262cae8c9209f @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<p>== Linux commits ==</p>
<p>f619e6bfa217 drm/i915/dg2: update link training for 128b/132b<br />
44526b8ce97b drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH, LOW} for 128b/132b<br />
73b7a835f7b3 drm/i915/dg2: use 128b/132b transcoder DDI mode<br />
753442fe1e74 drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0<br />
76465b4d3708 drm/i915/dp: select 128b/132b channel encoding for UHBR rates<br />
7d3f86063b7b drm/i915/dp: use 128b/132b TPS2 for UHBR+ link rates<br />
9cf6be09b318 drm/i915/dp: add max data rate calculation for UHBR rates<br />
310bd160b5df drm/i915/dg2: add DG2 UHBR source rates<br />
09dd0b1c53f5 drm/i915/dg2: add TRANS_DP2_VFREQHIGH and TRANS_DP2_VFREQLOW<br />
2ae1f5cd9112 drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b mode<br />
bd393efa3f8d drm/i915/dg2: add TRANS_DP2_CTL register definition<br />
4d03932add3c drm/i915/dp: read sink UHBR rates<br />
2c801bbdc46b drm/i915/dp: use actual link rate values in struct link_config_limits<br />
348fff506827 drm/dp: add helper for extracting adjust 128b/132b TX FFE preset<br />
176cd12c2a2e drm/dp: add LTTPR DP 2.0 DPCD addresses<br />
15972d4824f6 drm/dp: use more of the extended receiver cap<br />
098494421cf3 drm/dp: add DP 2.0 UHBR link rate and bw code conversions</p>
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