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<div>On Fri, 2022-09-09 at 08:38 -0700, Dixit, Ashutosh wrote:</div>
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<div>On Fri, 09 Sep 2022 03:13:05 -0700, Rodrigo Vivi wrote:<br>
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<div>On Wed, Sep 07, 2022 at 10:22:49PM -0700, Ashutosh Dixit wrote:<br>
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<div>From: Tilak Tangudu <<a href="mailto:tilak.tangudu@intel.com">tilak.tangudu@intel.com</a>><br>
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<div>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h<br>
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<div>index 24009786f88b..9492f8f43b25 100644<br>
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<div>--- a/drivers/gpu/drm/i915/i915_reg.h<br>
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<div>+++ b/drivers/gpu/drm/i915/i915_reg.h<br>
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<div>@@ -1802,6 +1802,7 @@<br>
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<div> #define POWER_LIMIT_4_MASK REG_BIT(8)<br>
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<div> #define POWER_LIMIT_1_MASK REG_BIT(10)<br>
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<div> #define POWER_LIMIT_2_MASK REG_BIT(11)<br>
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<div>+#define GT0_PERF_LIMIT_REASONS_LOG_MASK REG_GENMASK(31, 16)<br>
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<div>I'm kind of confused here because I saw the other bits in the patch 5.<br>
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<div>Sorry Rodrigo, patch 5 is a bug-fix patch which should probably be merged<br>
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<div>to -fixes independent of this series, I have posted it independently too:<br>
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<div><a href="https://patchwork.freedesktop.org/series/108277/">https://patchwork.freedesktop.org/series/108277/</a><br>
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<div>yeap, better to merge this one first.</div>
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<div>I hope <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108277v2/shard-apl4/igt@i915_pm_rps@engine-order.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108277v2/shard-apl4/igt@i915_pm_rps@engine-order.html</a></div>
<div>is not related to this patch. should we trigger a retest?</div>
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<div>I was debating including patch 5 as part of this series but then it was<br>
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<div>touching the same code so I ended up including it. Sorry for the confusion.<br>
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<div>no worries. it makes sense now.</div>
<div>Thanks for the patience</div>
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<div>but, anyway, thanks for improving the commit msg.<br>
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<div>Reviewed-by: Rodrigo Vivi <<a href="mailto:rodrigo.vivi@intel.com">rodrigo.vivi@intel.com</a>><br>
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<div>Thanks.<br>
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<div>--<br>
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<div>Ashutosh<br>
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