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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>drm/i915/tc: Align the ADLP TypeC sequences with bspec</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/115556/">https://patchwork.freedesktop.org/series/115556/</a></td></tr>
<tr><td><b>State:</b></td><td>success</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_12905 -> Patchwork_115556v1</h1>
<h2>Summary</h2>
<p><strong>SUCCESS</strong></p>
<p>No regressions found.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/index.html</p>
<h2>Participating hosts (37 -> 36)</h2>
<p>Missing (1): fi-snb-2520m </p>
<h2>Known issues</h2>
<p>Here are the changes found in Patchwork_115556v1 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>
<p>igt@i915_selftest@live@gt_heartbeat:</p>
<ul>
<li>fi-apl-guc: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html">DMESG-FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/5334">i915#5334</a>)</li>
</ul>
</li>
<li>
<p>igt@i915_selftest@live@requests:</p>
<ul>
<li>bat-rpls-1: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-rpls-1/igt@i915_selftest@live@requests.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-rpls-1/igt@i915_selftest@live@requests.html">ABORT</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/7911">i915#7911</a>)</li>
</ul>
</li>
</ul>
<h4>Possible fixes</h4>
<ul>
<li>igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:<ul>
<li>bat-dg2-8: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html">FAIL</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html">PASS</a></li>
</ul>
</li>
</ul>
<h4>Warnings</h4>
<ul>
<li>igt@i915_selftest@live@slpc:<ul>
<li>bat-rpls-2: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-rpls-2/igt@i915_selftest@live@slpc.html">DMESG-FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/6997">i915#6997</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/7913">i915#7913</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-rpls-2/igt@i915_selftest@live@slpc.html">DMESG-FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/6367">i915#6367</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/7913">i915#7913</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/7996">i915#7996</a>)</li>
</ul>
</li>
</ul>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_12905 -> Patchwork_115556v1</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_12905: 3a266f994a6b752953eb974ab7bf1dc382a2d1b8 @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_7211: c0cc1de7b2f4041ca68960362aa55f881d416bac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git<br />
Patchwork_115556v1: 3a266f994a6b752953eb974ab7bf1dc382a2d1b8 @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<h3>Linux commits</h3>
<p>eacb3f20579c drm/i915: Remove the encoder update_prepare()/complete() hooks<br />
c8a755423ba4 drm/i915: Remove TC PHY disconnect workaround<br />
8953b94f744d drm/i915: Disable DPLLs before disconnecting the TC PHY<br />
a31485fd5235 drm/i915: Move shared DPLL disabling into CRTC disable hook<br />
a6f821a3e5c2 drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec<br />
fc9377aaa0ab drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()<br />
ef101363e765 drm/i915/tc: Get power ref for reading the HPD live status register<br />
ba700337d218 drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection<br />
c2e2b015e2e4 drm/i915/tc: Add TC PHY hook to init the PHY<br />
782e1f88fc75 drm/i915/tc: Add asserts in TC PHY hooks that the required power is on<br />
07a6ccb9873c drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain<br />
2093be8d1e71 drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter<br />
7d333d02799d drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()<br />
20215aab0c94 drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks<br />
c52180943cea drm/i915/tc: Check TC mode instead of the VBT legacy flag<br />
902536fbcc24 drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode<br />
e92c6edf73a2 drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY<br />
90848d33f675 drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()<br />
fd64967db134 drm/i915/tc: Add generic TC PHY connect/disconnect handlers<br />
caf5d74cefb4 drm/i915/tc: Add TC PHY hook to read out the PHY HW state<br />
07b2f0b9762c drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state<br />
3ad47bfe8a83 drm/i915/tc: Add TC PHY hook to get the PHY HPD live status<br />
0114b48c0cc1 drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c<br />
25f5ce3954fb drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()<br />
4b423900f9e6 drm/i915/tc: Move TC port fields to a new intel_tc_port struct<br />
89eccb3efa96 drm/i915/tc: Use the tc_phy prefix for all TC PHY functions<br />
790a351f1457 drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()<br />
773eeb4fba3e drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions<br />
35d186692393 drm/i915/tc: Group the TC PHY setup/query functions per platform</p>
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