<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style>
</head>
<body dir="ltr">
<div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);" class="elementToProof ContentPasted0">
> The previouse i915_gem_object_create_internal already set it with proper
<div class="ContentPasted0">> value before function return. This hard coded setting is incorrect for</div>
<div class="ContentPasted0">> platforms like MTL, thus need to be removed.</div>
<div class="ContentPasted0">></div>
<div class="ContentPasted0">> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com></div>
<div class="ContentPasted0">> ---</div>
<div class="ContentPasted0">> drivers/gpu/drm/i915/gt/intel_timeline.c | 2 --</div>
<div class="ContentPasted0">> 1 file changed, 2 deletions(-)</div>
<div class="ContentPasted0">></div>
<div class="ContentPasted0">> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c</div>
<div class="ContentPasted0">> index b9640212d659..693d18e14b00 100644</div>
<div class="ContentPasted0">> --- a/drivers/gpu/drm/i915/gt/intel_timeline.c</div>
<div class="ContentPasted0">> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c</div>
<div class="ContentPasted0">> @@ -26,8 +26,6 @@ static struct i915_vma *hwsp_alloc(struct intel_gt *gt)</div>
<div class="ContentPasted0">> if (IS_ERR(obj))</div>
<div class="ContentPasted0">> return ERR_CAST(obj);</div>
<div class="ContentPasted0">></div>
<div class="ContentPasted0">> - i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);</div>
<div class="ContentPasted0">> -</div>
<div><br class="ContentPasted0">
</div>
<div class="ContentPasted0">Does this change really fix the coherency issue?</div>
<div class="ContentPasted0">I consulted with Chris and he said that the hwsp is purposely set to be</div>
<div class="ContentPasted0">cacheable. The mapping on CPU side also indicates it's cacheable,</div>
<div><br class="ContentPasted0">
</div>
<div class="ContentPasted0"> intel_timeline_pin_map(struct intel_timeline *timeline)</div>
<div class="ContentPasted0"> {</div>
<div class="ContentPasted0"> struct drm_i915_gem_object *obj = timeline->hwsp_ggtt->obj;</div>
<div class="ContentPasted0"> u32 ofs = offset_in_page(timeline->hwsp_offset);</div>
<div class="ContentPasted0"> void *vaddr;</div>
<div><br class="ContentPasted0">
</div>
<div class="ContentPasted0"> vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);</div>
<div class="ContentPasted0"> ...</div>
<div class="ContentPasted0"> }</div>
<div><br class="ContentPasted0">
</div>
<div class="ContentPasted0">> vma = i915_vma_instance(obj, >->ggtt->vm, NULL);</div>
<div class="ContentPasted0">> if (IS_ERR(vma))</div>
<div class="ContentPasted0">> i915_gem_object_put(obj);</div>
<div class="ContentPasted0">> --</div>
<div class="ContentPasted0">> 2.34.1</div>
<br>
</div>
</body>
</html>