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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>drm/i915: Add Display Port tunnel BW allocation support (rev2)</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/129082/">https://patchwork.freedesktop.org/series/129082/</a></td></tr>
<tr><td><b>State:</b></td><td>success</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129082v2/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129082v2/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_14305 -> Patchwork_129082v2</h1>
<h2>Summary</h2>
<p><strong>SUCCESS</strong></p>
<p>No regressions found.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129082v2/index.html</p>
<h2>Participating hosts (40 -> 39)</h2>
<p>Missing (1): fi-snb-2520m </p>
<h2>Possible new issues</h2>
<p>Here are the unknown changes that may have been introduced in Patchwork_129082v2:</p>
<h3>IGT changes</h3>
<h4>Suppressed</h4>
<p>The following results come from untrusted machines, tests, or statuses.<br />
They do not affect the overall result.</p>
<ul>
<li>igt@gem_softpin@safe-alignment:<ul>
<li>{bat-arls-2}: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14305/bat-arls-2/igt@gem_softpin@safe-alignment.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129082v2/bat-arls-2/igt@gem_softpin@safe-alignment.html">ABORT</a></li>
</ul>
</li>
</ul>
<h2>Known issues</h2>
<p>Here are the changes found in Patchwork_129082v2 that come from known issues:</p>
<h3>CI changes</h3>
<h4>Issues hit</h4>
<ul>
<li>boot:<ul>
<li>fi-bsw-n3050: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14305/fi-bsw-n3050/boot.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129082v2/fi-bsw-n3050/boot.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/8293">i915#8293</a>)</li>
</ul>
</li>
</ul>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>igt@i915_selftest@live@execlists:<ul>
<li>fi-bsw-nick: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14305/fi-bsw-nick/igt@i915_selftest@live@execlists.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129082v2/fi-bsw-nick/igt@i915_selftest@live@execlists.html">ABORT</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/7911">i915#7911</a>)</li>
</ul>
</li>
</ul>
<p>{name}: This element is suppressed. This means it is ignored when computing<br />
the status of the difference (SUCCESS, WARNING, or FAILURE).</p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_14305 -> Patchwork_129082v2</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_14305: 4b8a238dee9c18201f3652695414587cd2ef6d8f @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_7718: 40e8b9122853f455c84afcfa56469a6bc9a0d564 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git<br />
Patchwork_129082v2: 4b8a238dee9c18201f3652695414587cd2ef6d8f @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<h3>Linux commits</h3>
<p>ac3d933462e0 drm/i915/dp: Enable DP tunnel BW allocation mode<br />
8a3130d98ca2 drm/i915/dp: Read DPRX for all long HPD pulses<br />
9e26545ff64e drm/i915/dp: Suspend/resume DP tunnels<br />
4a6ed7708e66 drm/i915/dp: Call intel_dp_sync_state() always for DDI DP encoders<br />
633260352fcf drm/i915/dp: Handle DP tunnel IRQs<br />
e655a8dad126 drm/i915/dp: Allocate/free DP tunnel BW in the encoder enable/disable hooks<br />
861868fa5b1f drm/i915/dp: Compute DP tunnel BW during encoder state computation<br />
e6e8be41fc8e drm/i915/dp: Account for tunnel BW limit in intel_dp_max_link_data_rate()<br />
fdc02281f1ae drm/i915/dp: Add DP tunnel atomic state and check BW limit<br />
f65489307c55 drm/i915/dp: Add support for DP tunnel BW allocation<br />
389f06304a2f drm/i915/dp: Add way to get active pipes with syncing commits<br />
2ca5a931db6d drm/i915/dp: Add intel_dp_max_link_data_rate()<br />
348ef611b934 drm/i915/dp: Factor out intel_dp_read_dprx_caps()<br />
0d0ce61a14da drm/i915/dp: Factor out intel_dp_update_sink_caps()<br />
696cdaf32b54 drm/i915/dp: Export intel_dp_max_common_rate/lane_count()<br />
06addb22b256 drm/i915/dp: Factor out intel_dp_config_required_rate()<br />
b6c0fee143a2 drm/i915/dp: Use drm_dp_max_dprx_data_rate()<br />
6f16dda74ee5 drm/i915/dp: Add support to notify MST connectors to retry modesets<br />
6461ebe4ef9e drm/i915: Fix display bpp limit computation during system resume<br />
e34814cf0972 drm/dp: Add support for DP tunneling<br />
4bf7a633951f drm/dp: Add drm_dp_max_dprx_data_rate()</p>
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