<!DOCTYPE html> <html> <head> <meta http-equiv="Content-Type" content="text/html; charset=UTF-8"> </head> <body> Hi Andi, <div class="moz-cite-prefix">On 5/17/2024 9:34 PM, Andi Shyti wrote: </div> <blockquote type="cite" cite="mid:ZkexSOO9MYt7Y9-8@ashyti-mobl2.lan"> <pre class="moz-quote-pre" wrap="">Hi Nirmoy, On Fri, May 17, 2024 at 04:00:02PM +0200, Nirmoy Das wrote: </pre> <blockquote type="cite"> <pre class="moz-quote-pre" wrap="">On 5/17/2024 1:25 PM, Andi Shyti wrote: </pre> <blockquote type="cite"> <pre class="moz-quote-pre" wrap="">If we timeout while waiting for an FLR reset, there is nothing we can do and i915 doesn't have any control on it. In any case the system is still perfectly usable </pre> </blockquote> <pre class="moz-quote-pre" wrap=""> If a FLR reset fails then we will have a dead GPU, I don't think the GPU is usable without a cold reboot. </pre> </blockquote> <pre class="moz-quote-pre" wrap=""> fact is that the GPU keeps going and even though the timeout has expired, the system moves to the next phase.</pre> </blockquote> The current test might look like it is has passed, but if you look into the subsequent tests you can see a dead GPU: <pre style="color: rgb(255, 255, 255); font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial; overflow-wrap: break-word; white-space: pre-wrap;"><7>[ 369.168121] pci 0000:00:02.0: [drm:intel_uncore_fini_mmio [i915]] Triggering Driver-FLR <3>[ 372.170189] pci 0000:00:02.0: [drm] *ERROR* Driver-FLR-teardown wait completion failed! -110 <7>[ 372.437630] [IGT] i915_selftest: finished subtest requests, SUCCESS <7>[ 372.438356] [IGT] i915_selftest: starting dynamic subtest migrate <5>[ 373.110580] Setting dangerous option live_selftests - tainting kernel <3>[ 373.183499] i915 0000:00:02.0: Unable to change power state from D0 to D0, device inaccessible <3>[ 373.246921] i915 0000:00:02.0: [drm] *ERROR* Unrecognized display IP version 1023.255; disabling display. <7>[ 373.247130] i915 0000:00:02.0: [drm:intel_step_init [i915]] Using future steppings <7>[ 373.247716] i915 0000:00:02.0: [drm:intel_step_init [i915]] Using future steppings <7>[ 373.248263] i915 0000:00:02.0: [drm:intel_step_init [i915]] Using future display steppings <7>[ 373.251843] i915 0000:00:02.0: [drm:intel_gt_common_init_early [i915]] WOPCM: 2048K <7>[ 373.252505] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] GT0: enable_guc=3 (guc:yes submission:yes huc:no slpc:yes) <7>[ 373.253140] i915 0000:00:02.0: [drm:intel_gt_probe_all [i915]] GT0: Setting up Primary GT <7>[ 373.253556] i915 0000:00:02.0: [drm:intel_gt_probe_all [i915]] GT1: Setting up Standalone Media GT <7>[ 373.253941] i915 0000:00:02.0: [drm:intel_gt_common_init_early [i915]] WOPCM: 2048K <7>[ 373.254365] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] GT1: enable_guc=3 (guc:yes submission:yes huc:yes slpc:yes) <3>[ 375.256235] i915 0000:00:02.0: [drm] *ERROR* Device is non-operational; MMIO access returns 0xFFFFFFFF! <3>[ 375.259089] i915 0000:00:02.0: Device initialization failed (-5) <3>[ 375.260521] i915 0000:00:02.0: probe with driver i915 failed with error -5 <7>[ 375.392209] [IGT] i915_selftest: finished subtest migrate, FAIL <a class="moz-txt-link-freetext" href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14724/bat-arls-3/dmesg0.txt">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14724/bat-arls-3/dmesg0.txt</a> </pre> <blockquote type="cite" cite="mid:ZkexSOO9MYt7Y9-8@ashyti-mobl2.lan"> <pre class="moz-quote-pre" wrap=""> </pre> <blockquote type="cite"> <pre class="moz-quote-pre" wrap="">This is a serious issue and should be report as an error. I think we need to create a HW ticket to understand why is FLR reset fails. </pre> </blockquote> <pre class="moz-quote-pre" wrap=""> Maybe it takes longer and longer to reset. We've been sending several patches in the latest years to fix the timings.</pre> </blockquote> HW spec says 3 sec but we can try increasing it bit higher to try it out. Regards, Nirmoy <blockquote type="cite" cite="mid:ZkexSOO9MYt7Y9-8@ashyti-mobl2.lan"> <pre class="moz-quote-pre" wrap=""> Andi </pre> </blockquote> </body> </html>