[PATCH v2 2/2] drm/i915/gvt: Apply g2h adjust during fence mmio access

[Zhang, Yulei]

> -----Original Message-----
> From: Zhenyu Wang [mailto:zhenyuw at linux.intel.com]
> Sent: Monday, April 17, 2017 1:17 PM
> To: Zhang, Yulei <yulei.zhang at intel.com>
> Cc: intel-gvt-dev at lists.freedesktop.org
> Subject: Re: [PATCH v2 2/2] drm/i915/gvt: Apply g2h adjust during fence
> mmio access
> 
> On 2017.04.17 18:43:07 +0800, Yulei Zhang wrote:
> > Apply guest to host gma conversion while guest config the physical
> > fence mmio registers.
> >
> > V2:
> > Add component id in the title.
> >
> > Signed-off-by: Yulei Zhang <yulei.zhang at intel.com>
> > ---
> >  drivers/gpu/drm/i915/gvt/aperture_gm.c |  6 ++++--
> >  drivers/gpu/drm/i915/gvt/gvt.h         | 14 ++++++++++++++
> >  2 files changed, 18 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
> > b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> > index 325618d..792d7e2 100644
> > --- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
> > +++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> > @@ -144,8 +144,10 @@ void intel_vgpu_write_fence(struct intel_vgpu
> *vgpu,
> >  	I915_WRITE(fence_reg_lo, 0);
> >  	POSTING_READ(fence_reg_lo);
> >
> > -	I915_WRITE(fence_reg_hi, upper_32_bits(value));
> > -	I915_WRITE(fence_reg_lo, lower_32_bits(value));
> > +	I915_WRITE(fence_reg_hi,
> > +			intel_gvt_reg_g2h(vgpu, upper_32_bits(value),
> 0xFFFFF000));
> > +	I915_WRITE(fence_reg_lo,
> > +			intel_gvt_reg_g2h(vgpu, lower_32_bits(value),
> 0xFFFFF000));
> >  	POSTING_READ(fence_reg_lo);
> >  }
> >
> > diff --git a/drivers/gpu/drm/i915/gvt/gvt.h
> > b/drivers/gpu/drm/i915/gvt/gvt.h index 930732e..31dec2a 100644
> > --- a/drivers/gpu/drm/i915/gvt/gvt.h
> > +++ b/drivers/gpu/drm/i915/gvt/gvt.h
> > @@ -431,6 +431,20 @@ int intel_gvt_ggtt_index_g2h(struct intel_vgpu
> > *vgpu, unsigned long g_index,  int intel_gvt_ggtt_h2g_index(struct
> intel_vgpu *vgpu, unsigned long h_index,
> >  			     unsigned long *g_index);
> >
> > +static inline u64 intel_gvt_reg_g2h(struct intel_vgpu *vgpu,
> > +		u32 addr, u32 mask)
> > +{
> > +	u64 gma;
> > +
> > +	if (addr) {
> 
> if (addr & mask)?
> 
> > +		intel_gvt_ggtt_gmadr_g2h(vgpu,
> > +				addr & mask, &gma);
> > +		gma |= (addr & (~mask));
> > +		return gma;
> > +	} else
> > +		return addr;
> > +}
> 
> not need extra else, just return original value, might better to have a
> description comment for this helper function.
> 
Thanks, will refine it. 

> >  void intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu,
> >  		bool primary);
> >  void intel_vgpu_reset_cfg_space(struct intel_vgpu *vgpu);
> > --
> > 2.9.3
> >
> > _______________________________________________
> > intel-gvt-dev mailing list
> > intel-gvt-dev at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
> 
> --
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