[PATCH] [intel-gvt] [TDR] drm/i915/gvt: refine virtual reset function

[Zhenyu Wang]

On 2017.04.19 13:09:38 +0800, fred gao wrote:
> during the emulation of virtual reset:
> 1. add handler for GEN6_GDRST read;

split this, as above is first one for GDRST handler, and second one for vgpu
change from guest reset.

> 2. all the mmio are not restored to default values
> 3. pvinfo and fence resources are not required to set default
>    value as well to prevent screen flicking.
> 
> this will fix the issue of Guest screen hang while running
> Force tdr in Linux guest.
> 
> Signed-off-by: fred gao <fred.gao at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 10 +++++++++-
>  drivers/gpu/drm/i915/gvt/vgpu.c     | 10 +++++++---
>  2 files changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 4a24dc1..4623771 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -300,6 +300,14 @@ static int gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
>  	return 0;
>  }
>  
> +static int gdrst_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
> +			    void *p_data, unsigned int bytes)
> +{
> +	*(u32 *)p_data = 0;
> +
> +	return 0;
> +}
> +
>  static int gmbus_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
>  		void *p_data, unsigned int bytes)
>  {
> @@ -2210,7 +2218,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
>  
>  	MMIO_D(RSTDBYCTL, D_ALL);
>  
> -	MMIO_DH(GEN6_GDRST, D_ALL, NULL, gdrst_mmio_write);
> +	MMIO_DH(GEN6_GDRST, D_ALL, gdrst_mmio_read, gdrst_mmio_write);
>  	MMIO_F(FENCE_REG_GEN6_LO(0), 0x80, 0, 0, 0, D_ALL, fence_mmio_read, fence_mmio_write);
>  	MMIO_F(VGT_PVINFO_PAGE, VGT_PVINFO_SIZE, F_UNALIGN, 0, 0, D_ALL, pvinfo_mmio_read, pvinfo_mmio_write);
>  	MMIO_DH(CPU_VGACNTRL, D_ALL, NULL, vga_control_mmio_write);
> diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
> index fcd3c27..9d9df4d 100644
> --- a/drivers/gpu/drm/i915/gvt/vgpu.c
> +++ b/drivers/gpu/drm/i915/gvt/vgpu.c
> @@ -429,9 +429,13 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
>  	/* full GPU reset or device model level reset */
>  	if (engine_mask == ALL_ENGINES || dmlr) {
>  		intel_vgpu_reset_gtt(vgpu, dmlr);
> -		intel_vgpu_reset_resource(vgpu);
> -		intel_vgpu_reset_mmio(vgpu);
> -		populate_pvinfo_page(vgpu);
> +
> +		if (dmlr) {
> +			intel_vgpu_reset_resource(vgpu);
> +			intel_vgpu_reset_mmio(vgpu);

For vgpu reset, suppose we should still reset mmio to initial state,
for fence that should be ok to be left, which would be re-initialized
but guest anyway.

> +			populate_pvinfo_page(vgpu);
> +		}
> +
>  		intel_vgpu_reset_display(vgpu);
>  
>  		if (dmlr) {
> -- 
> 2.7.4
> 
> _______________________________________________
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> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
Open Source Technology Center, Intel ltd.

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