[PATCH] drm/i915/gvt: enter failsafe mode when guest requires more resources
Tian, Kevin
kevin.tian at intel.com
Wed Feb 15 08:08:28 UTC 2017
> From: He, Min
> Sent: Wednesday, February 15, 2017 4:02 PM
>
>
> 在 2/15/2017 3:51 PM, Tian, Kevin 写道:
> >> From: Min He
> >> Sent: Wednesday, February 15, 2017 3:34 PM
> >>
> >> Windows guest will notitfy GVTg to request more resources through g2v
> >> interface, when its resources are not enough.
> >> This patch is to handle this case and let vgpu enter failsafe mode to
> >> avoid to many error messages.
> >>
> >> Signed-off-by: Min He <min.he at intel.com>
> >> Signed-off-by: Pei Zhang <pei.zhang at intel.com>
> >> ---
> >> drivers/gpu/drm/i915/gvt/handlers.c | 15 +++++++++++++++
> >> drivers/gpu/drm/i915/i915_pvinfo.h | 17 +++++++++++++++--
> >> 2 files changed, 30 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
> b/drivers/gpu/drm/i915/gvt/handlers.c
> >> index 6089a1e..50a1850 100644
> >> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> >> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> >> @@ -1090,6 +1090,21 @@ static int pvinfo_mmio_write(struct intel_vgpu *vgpu,
> >> unsigned int offset,
> >> case _vgtif_reg(execlist_context_descriptor_lo):
> >> case _vgtif_reg(execlist_context_descriptor_hi):
> >> break;
> >> + case _vgtif_reg(min_low_gmadr):
> >> + gvt_err("Guest requires %d aperture size!\n", data);
> >> + break;
> >> + case _vgtif_reg(min_high_gmadr):
> >> + gvt_err("Guest requires %d hidden gm size!\n", data);
> >> + break;
> >> + case _vgtif_reg(min_fence_num):
> >> + gvt_err("Guest requires %d fence size!\n", data);
> >> + break;
> > above information is not an obvious error message. at least sth like:
> >
> > Guest requests more fences which is not supported by this type.
> Ok. Will modify these messages in V2.
>
> >
> >> + case _vgtif_reg(rs_insufficient):
> >> + pr_err("***Guest resource is not enough**********\n");
> >> + pr_err("***Please try another vgpu type**********\n");
> >> + pr_err("***Entering failsafe mode****************\n");
> >> + vgpu->failsafe = true;
> >> + break;
> >> default:
> >> gvt_err("invalid pvinfo write offset %x bytes %x data %x\n",
> >> offset, bytes, data);
> >> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h
> b/drivers/gpu/drm/i915/i915_pvinfo.h
> >> index c0cb297..98a0f18 100644
> >> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> >> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> >> @@ -86,8 +86,21 @@ struct vgt_if {
> >> */
> >> u32 rsv4;
> >> u32 display_ready; /* ready for display owner switch */
> >> -
> >> - u32 rsv5[4];
> >> + /*
> >> + * driver reported status/error code
> >> + * 0: if the avail_rs is sufficient to driver
> >> + * Bit 2,1,0 set indicating
> >> + * Insufficient low_gmadr, high_gmadr, fence resources.
> >> + * Other bits are reserved.
> >> + */
> >> + uint32_t rs_insufficient;
> >> + /*
> >> + * The driver is required to update the following field with minimal
> >> + * required resource size.
> >> + */
> >> + uint32_t min_low_gmadr;
> >> + uint32_t min_high_gmadr;
> >> + uint32_t min_fence_num;
> > If such operation is not supported, instead of explicitly defining
> > them and then fail, it's cleaner to keep original definition while
> > simply fallback to failsafe if any reserved offset is written.
> This interface was defined in production branch, but somehow it's
> removed during
> upstream. So I added them back into pvinfo structure.
>
No need of doing so. If required in the future, you can introduce
them at that time. For now as I commented above, the policy
is more about accessing to reserved fields...
Thanks
Kevin
More information about the intel-gvt-dev
mailing list