[PATCH] drm/i915/gvt: add new mmio_info flag to avoid log flood

[Pei Zhang]

If guest is accessing an un-expected mmio through cmd, gvt will print an
error log. In some special case, the guest cmd access is very huge which
cause the error log flood. Add a special flag to avoid this condition.

Signed-off-by: Pei Zhang <pei.zhang at intel.com>
---
 drivers/gpu/drm/i915/gvt/cmd_parser.c |  5 ++++-
 drivers/gpu/drm/i915/gvt/handlers.c   | 16 ++++++++++++++++
 drivers/gpu/drm/i915/gvt/mmio.h       |  4 ++++
 3 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index 7ee1db7..9dc55df 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -830,8 +830,11 @@ static int cmd_reg_handler(struct parser_exec_state *s,
 	}
 
 	if (!intel_gvt_mmio_is_cmd_access(gvt, offset)) {
-		gvt_err("vgpu%d: %s access to non-render register (%x)\n",
+		if (!intel_gvt_mmio_is_cmd_access_violate(gvt, offset)) {
+			intel_gvt_mmio_set_cmd_access_violate(gvt, offset);
+			gvt_err("vgpu%d: %s access to non-render register (%x)\n",
 				s->vgpu->id, cmd, offset);
+		}
 		return 0;
 	}
 
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 8fc673a..48176b3 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -61,6 +61,8 @@
 #define F_CMD_ACCESSED	(1 << 5)
 /* This reg could be accessed by unaligned address */
 #define F_UNALIGN	(1 << 6)
+/* If guest cmd access a mmio without CMD_ACCESS flag, record it */
+#define F_CMD_ACCESS_VIOLATE (1 << 7)
 
 unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt)
 {
@@ -2755,6 +2757,20 @@ bool intel_gvt_mmio_is_cmd_access(struct intel_gvt *gvt,
 		F_CMD_ACCESS;
 }
 
+void intel_gvt_mmio_set_cmd_access_violate(struct intel_gvt *gvt,
+		unsigned int offset)
+{
+	gvt->mmio.mmio_attribute[offset >> 2] |=
+		F_CMD_ACCESS_VIOLATE;
+}
+
+bool intel_gvt_mmio_is_cmd_access_violate(struct intel_gvt *gvt,
+		unsigned int offset)
+{
+	return gvt->mmio.mmio_attribute[offset >> 2] &
+		F_CMD_ACCESS_VIOLATE;
+}
+
 /**
  * intel_gvt_mmio_is_unalign - mark a MMIO could be accessed unaligned
  * @gvt: a GVT device
diff --git a/drivers/gpu/drm/i915/gvt/mmio.h b/drivers/gpu/drm/i915/gvt/mmio.h
index 3bc620f..7b6c78b 100644
--- a/drivers/gpu/drm/i915/gvt/mmio.h
+++ b/drivers/gpu/drm/i915/gvt/mmio.h
@@ -98,10 +98,14 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, u64 pa,
 				void *p_data, unsigned int bytes);
 bool intel_gvt_mmio_is_cmd_access(struct intel_gvt *gvt,
 				  unsigned int offset);
+bool intel_gvt_mmio_is_cmd_access_violate(struct intel_gvt *gvt,
+				  unsigned int offset);
 bool intel_gvt_mmio_is_unalign(struct intel_gvt *gvt, unsigned int offset);
 void intel_gvt_mmio_set_accessed(struct intel_gvt *gvt, unsigned int offset);
 void intel_gvt_mmio_set_cmd_accessed(struct intel_gvt *gvt,
 				     unsigned int offset);
+void intel_gvt_mmio_set_cmd_access_violate(struct intel_gvt *gvt,
+					unsigned int offset);
 bool intel_gvt_mmio_has_mode_mask(struct intel_gvt *gvt, unsigned int offset);
 int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
 				 void *p_data, unsigned int bytes);
-- 
2.7.4