[PATCH] Error handle - handle fence reg during GPU reset

[Zhao, Xinda]

Ok, I will submit a new patch for review after resolving Min's comments, I will change the title at that time.

> -----Original Message-----
> From: intel-gvt-dev [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On
> Behalf Of Zhenyu Wang
> Sent: Friday, February 17, 2017 1:09 PM
> To: Zhao, Xinda <xinda.zhao at intel.com>
> Cc: intel-gvt-dev at lists.freedesktop.org
> Subject: Re: [PATCH] Error handle - handle fence reg during GPU reset
> 
> 
> Pls follow current practise, patch title should start with driver name
> "drm/i915/gvt: xxx".
> 
> On 2017.02.17 11:41:24 +0800, Zhao, Xinda wrote:
> > Lots of reduntant log info will be printed out during GPU reset,
> > including accessing untracked mmio register and fence register,
> > variable disable_warn_untrack is added previously to handle the
> > situation, but the accessing of fence register is ignored in the
> > previously patch, so add it back.
> >
> > Besides, set the variable disable_warn_untrack to the defalut value
> > after GPU reset is finished.
> >
> > Signed-off-by: Zhao, Xinda <xinda.zhao at intel.com>
> > ---
> >  drivers/gpu/drm/i915/gvt/handlers.c | 11 +++++++----
> >  drivers/gpu/drm/i915/gvt/mmio.c     |  2 ++
> >  2 files changed, 9 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
> > b/drivers/gpu/drm/i915/gvt/handlers.c
> > index 1d45062..6406394 100644
> > --- a/drivers/gpu/drm/i915/gvt/handlers.c
> > +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> > @@ -154,10 +154,13 @@ static int sanitize_fence_mmio_access(struct
> intel_vgpu *vgpu,
> >  		unsigned int fence_num, void *p_data, unsigned int bytes)  {
> >  	if (fence_num >= vgpu_fence_sz(vgpu)) {
> > -		gvt_err("vgpu%d: found oob fence register access\n",
> > -				vgpu->id);
> > -		gvt_err("vgpu%d: total fence num %d access fence num %d\n",
> > -				vgpu->id, vgpu_fence_sz(vgpu), fence_num);
> > +		if (!vgpu->mmio.disable_warn_untrack) {
> > +			gvt_err("vgpu%d: found oob fence register access\n",
> > +					vgpu->id);
> > +			gvt_err("vgpu%d: total fence %d, access fence %d\n",
> > +					vgpu->id, vgpu_fence_sz(vgpu),
> > +					fence_num);
> > +		}
> >  		memset(p_data, 0, bytes);
> >  	}
> >  	return 0;
> > diff --git a/drivers/gpu/drm/i915/gvt/mmio.c
> > b/drivers/gpu/drm/i915/gvt/mmio.c index 4df078b..7a5bbb8 100644
> > --- a/drivers/gpu/drm/i915/gvt/mmio.c
> > +++ b/drivers/gpu/drm/i915/gvt/mmio.c
> > @@ -322,6 +322,8 @@ void intel_vgpu_reset_mmio(struct intel_vgpu
> > *vgpu)
> >
> >  	/* set the bit 0:2(Core C-State ) to C0 */
> >  	vgpu_vreg(vgpu, GEN6_GT_CORE_STATUS) = 0;
> > +
> > +	vgpu->mmio.disable_warn_untrack = false;
> >  }
> >
> >  /**
> > --
> > 2.7.4
> >
> > _______________________________________________
> > intel-gvt-dev mailing list
> > intel-gvt-dev at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
> 
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