[PATCH] drm/i915/gvt: add 2 new MMIO to cmd_access white list

[Zhang, Pei]

@Zhengyu, this patch is based on gvt-staging. Please try again. Thanks. 

*********  ***** 
BRs, 
Pei Zhang


> -----Original Message-----
> From: Zhang, Pei
> Sent: Saturday, February 18, 2017 01:19
> To: intel-gvt-dev at lists.freedesktop.org
> Cc: Zhang, Pei <pei.zhang at intel.com>
> Subject: [PATCH] drm/i915/gvt: add 2 new MMIO to cmd_access white list
> 
> Guest is now acces 2 MMIO (0x215c, 0x20c0) through command which is not
> originally in gvt's white list. This cause huge error log printed in gvt.
> This patch addes these 2 MMIO to the white list.
> 
> V2. change the commit message content.
> 
> Signed-off-by: Pei Zhang <pei.zhang at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
> b/drivers/gpu/drm/i915/gvt/handlers.c
> index 1d45062..baf3d62 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -2160,7 +2160,8 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
> 
>  	MMIO_D(0x44070, D_ALL);
> 
> -	MMIO_D(0x215c, D_HSW_PLUS);
> +	MMIO_DFH(0x215c, D_HSW_PLUS, F_CMD_ACCESS, NULL, NULL);
> +	MMIO_DFH(0x20c0, D_HSW_PLUS, F_CMD_ACCESS, NULL, NULL);
>  	MMIO_DFH(0x2178, D_ALL, F_CMD_ACCESS, NULL, NULL);
>  	MMIO_DFH(0x217c, D_ALL, F_CMD_ACCESS, NULL, NULL);
>  	MMIO_DFH(0x12178, D_ALL, F_CMD_ACCESS, NULL, NULL);
> --
> 2.7.4