[PATCH] drm/i915/gvt: add more registers to context save/restore list

[Zhenyu Wang]

On 2017.02.21 09:39:00 +0800, Zhao Yan wrote:
> the value of those registers should be applied to hardware on
> context restoring
> 
> Signed-off-by: Zhao Yan <yan.y.zhao at intel.com>
> ---

applied, thanks!

>  drivers/gpu/drm/i915/gvt/render.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
> index 2b3a642..73f052a 100644
> --- a/drivers/gpu/drm/i915/gvt/render.c
> +++ b/drivers/gpu/drm/i915/gvt/render.c
> @@ -53,6 +53,14 @@ struct render_mmio {
>  	{RCS, _MMIO(0x24d4), 0, false},
>  	{RCS, _MMIO(0x24d8), 0, false},
>  	{RCS, _MMIO(0x24dc), 0, false},
> +	{RCS, _MMIO(0x24e0), 0, false},
> +	{RCS, _MMIO(0x24e4), 0, false},
> +	{RCS, _MMIO(0x24e8), 0, false},
> +	{RCS, _MMIO(0x24ec), 0, false},
> +	{RCS, _MMIO(0x24f0), 0, false},
> +	{RCS, _MMIO(0x24f4), 0, false},
> +	{RCS, _MMIO(0x24f8), 0, false},
> +	{RCS, _MMIO(0x24fc), 0, false},
>  	{RCS, _MMIO(0x7004), 0xffff, true},
>  	{RCS, _MMIO(0x7008), 0xffff, true},
>  	{RCS, _MMIO(0x7000), 0xffff, true},
> @@ -76,6 +84,14 @@ struct render_mmio {
>  	{RCS, _MMIO(0x24d4), 0, false},
>  	{RCS, _MMIO(0x24d8), 0, false},
>  	{RCS, _MMIO(0x24dc), 0, false},
> +	{RCS, _MMIO(0x24e0), 0, false},
> +	{RCS, _MMIO(0x24e4), 0, false},
> +	{RCS, _MMIO(0x24e8), 0, false},
> +	{RCS, _MMIO(0x24ec), 0, false},
> +	{RCS, _MMIO(0x24f0), 0, false},
> +	{RCS, _MMIO(0x24f4), 0, false},
> +	{RCS, _MMIO(0x24f8), 0, false},
> +	{RCS, _MMIO(0x24fc), 0, false},
>  	{RCS, _MMIO(0x7004), 0xffff, true},
>  	{RCS, _MMIO(0x7008), 0xffff, true},
>  	{RCS, _MMIO(0x7000), 0xffff, true},
> -- 
> 1.9.1
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
Open Source Technology Center, Intel ltd.

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