[PATCH 3/5] drm/i915/gvt: control the scheduler by timeslice usage
Ping Gao
ping.a.gao at intel.com
Thu Jan 26 01:19:16 UTC 2017
The timeslice usage will determine vGPU whether has chance to
schedule or not in a 100ms time slot.
Signed-off-by: Ping Gao <ping.a.gao at intel.com>
---
drivers/gpu/drm/i915/gvt/sched_policy.c | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c b/drivers/gpu/drm/i915/gvt/sched_policy.c
index 71c7913..513714b 100644
--- a/drivers/gpu/drm/i915/gvt/sched_policy.c
+++ b/drivers/gpu/drm/i915/gvt/sched_policy.c
@@ -190,6 +190,7 @@ static inline int gvt_nr_in_runq(struct tbs_sched_data *sched_data)
}
#define GVT_DEFAULT_TIME_SLICE (1 * HZ / 1000)
+#define vgpu_has_ts_limit(vgpu_data) ((vgpu_data)->ts_alloc < GVT_TS_BALANCE_PERIOD)
static void tbs_sched_func(struct work_struct *work)
{
@@ -228,11 +229,23 @@ static void tbs_sched_func(struct work_struct *work)
continue;
vgpu_data = container_of(pos, struct tbs_vgpu_data, list);
- if (!vgpu_has_pending_workload(vgpu_data->vgpu))
- continue;
- vgpu = vgpu_data->vgpu;
- break;
+ if (gvt_nr_in_runq(sched_data) == 1) {
+ vgpu = vgpu_data->vgpu;
+ break;
+ }
+ /* no need to check timeslice usage
+ * if alloced the Max timeslice
+ */
+ if (!vgpu_has_ts_limit(vgpu_data)) {
+ vgpu = vgpu_data->vgpu;
+ break;
+ }
+ /* allowed to schedule if has time slice left */
+ else if (vgpu_data->ts_usage > 0) {
+ vgpu = vgpu_data->vgpu;
+ break;
+ }
}
if (vgpu) {
--
2.7.4
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