[PATCH v2 6/6] drm/i915/gvt: Tuning the size of MMIO hash lookup table to 2048
changbin.du at intel.com
changbin.du at intel.com
Tue Jun 6 02:48:08 UTC 2017
From: Changbin Du <changbin.du at intel.com>
On Skylake platform, The traced virtual mmio registers are up to 2039.
So tuning the hash table size to improve lookup performance.
Signed-off-by: Changbin Du <changbin.du at intel.com>
---
drivers/gpu/drm/i915/gvt/gvt.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 3acf7fe..70e76c56 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -195,7 +195,7 @@ struct intel_gvt_fence {
unsigned long vgpu_allocated_fence_num;
};
-#define INTEL_GVT_MMIO_HASH_BITS 9
+#define INTEL_GVT_MMIO_HASH_BITS 11
struct intel_gvt_mmio {
u8 *mmio_attribute;
--
2.7.4
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