[PATCH] drm/i915/gvt: Add emulation of register GEN8_GTCR

[changbin.du at intel.com]

From: Changbin Du <changbin.du at intel.com>

Just found we missed this register in mmio list.
  gvt: vgpu 1: untracked MMIO 00004274 len 4

So here add the emulation for it. Only the first
bit is effective. Current bogus validation is to
shut up 'untraced mmio' error on guest boot. Remember
to implement the validation after GuC enabled.

Signed-off-by: Changbin Du <changbin.du at intel.com>
Reviewed-by: Yulei Zhang <yulei.zhang at intel.com>
---
 drivers/gpu/drm/i915/gvt/handlers.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 1414d7e..2b03728 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1416,6 +1416,20 @@ static int skl_lcpll_write(struct intel_vgpu *vgpu, unsigned int offset,
 	return 0;
 }
 
+static int gtcr_write(struct intel_vgpu *vgpu, unsigned int offset,
+		      void *p_data, unsigned int bytes)
+{
+	u32 v = *(u32 *)p_data;
+
+	/* TODO: Implement the validation after GuC enabled.
+	 * Current bogus validation is to shut up untraced
+	 * mmio error on guest boot.
+	 */
+	if (v & GEN8_GTCR_INVALIDATE)
+		vgpu_vreg(vgpu, offset) &= ~GEN8_GTCR_INVALIDATE;
+	return 0;
+}
+
 static int ring_timestamp_mmio_read(struct intel_vgpu *vgpu,
 		unsigned int offset, void *p_data, unsigned int bytes)
 {
@@ -2456,6 +2470,8 @@ static int init_broadwell_mmio_info(struct intel_gvt *gvt)
 	MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL,
 		intel_vgpu_reg_master_irq_handler);
 
+	MMIO_DH(GEN8_GTCR, D_BDW_PLUS, NULL, gtcr_write);
+
 	MMIO_DFH(RING_HWSTAM(GEN8_BSD2_RING_BASE), D_BDW_PLUS,
 		F_CMD_ACCESS, NULL, NULL);
 	MMIO_DFH(0x1c134, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);
-- 
2.7.4