[PATCH 2/2] drm/i915/gvt: Optimize ring siwtch 2x faster again by light weight mmio access wrapper

[Du, Changbin]

On Fri, Jun 23, 2017 at 02:38:54PM +0800, Zhenyu Wang wrote:
> On 2017.06.21 16:57:22 +0800, changbin.du at intel.com wrote:
> > From: Changbin Du <changbin.du at intel.com>
> > 
> > The I915_READ/WRITE is not only a mmio read/write, it also contains
> > debug checking and Forcewake domain lookup. This is too heavy for
> > GVT ring switch case which access batch of mmio registers on ring
> > switch. We can handle Forcewake manually and use the raw
> > i915_read/write instead. The benefit from this is 2x faster mmio
> > switch performance.
> >          Before       After
> > cycles  ~550000      ~250000
> > 
> > Signed-off-by: Changbin Du <changbin.du at intel.com>
> > ---
> >  drivers/gpu/drm/i915/gvt/render.c | 42 +++++++++++++++++++++++++++------------
> >  1 file changed, 29 insertions(+), 13 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
> > index 5a08bcd..609b0f9 100644
> > --- a/drivers/gpu/drm/i915/gvt/render.c
> > +++ b/drivers/gpu/drm/i915/gvt/render.c
> > @@ -37,6 +37,9 @@
> >  #include "gvt.h"
> >  #include "trace.h"
> >  
> > +#define	I915_RAW_WRITE(reg, val)	__raw_i915_write32(dev_priv, reg, val)
> > +#define	I915_RAW_READ(reg)		__raw_i915_read32(dev_priv, reg)
> > +
> 
> I915_READ_FW/I915_WRITE_FW
> 
ok, will use existing macro. thanks.

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-- 
Thanks,
Changbin Du
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