[PATCH] drm/i915/gvt: Add a missing register on BDW

[Zhao Yan]

add handling logic for register 0x2058

Signed-off-by: Zhao Yan <yan.y.zhao at intel.com>
---
 drivers/gpu/drm/i915/gvt/handlers.c | 2 ++
 drivers/gpu/drm/i915/gvt/render.c   | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 812e884..56ab2b6 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -2580,6 +2580,8 @@ static int init_broadwell_mmio_info(struct intel_gvt *gvt)
 	MMIO_D(0xd00, D_BDW | D_SKL);
 	MMIO_D(0xd40, D_BDW | D_SKL);
 	MMIO_D(0x6e544, D_BDW | D_SKL_PLUS);
+
+	MMIO_D(0x2058, D_BDW);
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
index 73f052a..48f5557 100644
--- a/drivers/gpu/drm/i915/gvt/render.c
+++ b/drivers/gpu/drm/i915/gvt/render.c
@@ -47,6 +47,7 @@ struct render_mmio {
 static struct render_mmio gen8_render_mmio_list[] = {
 	{RCS, _MMIO(0x229c), 0xffff, false},
 	{RCS, _MMIO(0x2248), 0x0, false},
+	{RCS, _MMIO(0x2058), 0x0, false},
 	{RCS, _MMIO(0x2098), 0x0, false},
 	{RCS, _MMIO(0x20c0), 0xffff, true},
 	{RCS, _MMIO(0x24d0), 0, false},
-- 
1.9.1