[PATCH] drm/i915/gvt: correct the ggtt valid bit check in pipe control command

[Zhenyu Wang]

On 2017.03.13 22:55:58 +0800, Yulei Zhang wrote:
> GGTT valid bit in pipe control command move to DWORD1 after SNB, so
> change the valid check code correspondingly.
> 
> Signed-off-by: Yulei Zhang <yulei.zhang at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/cmd_parser.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> index da6bbca..8859ad6 100644
> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> @@ -1008,7 +1008,7 @@ static int cmd_handler_pipe_control(struct parser_exec_state *s)
>  			ret = cmd_reg_handler(s, 0x2358, 1, "pipe_ctrl");
>  		else if (post_sync == 1) {
>  			/* check ggtt*/
> -			if ((cmd_val(s, 2) & (1 << 2))) {
> +			if ((cmd_val(s, 1) & BIT(24))) {

Change to use PIPE_CONTROL_GLOBAL_GTT_IVB instead.

>  				gma = cmd_val(s, 2) & GENMASK(31, 3);
>  				if (gmadr_bytes == 8)
>  					gma |= (cmd_gma_hi(s, 3)) << 32;
> -- 
> 1.9.1
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
Open Source Technology Center, Intel ltd.

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