[PATCH v2] drm/i915/gvt: correct the ggtt valid bit check in pipe control command
Zhenyu Wang
zhenyuw at linux.intel.com
Mon Mar 13 08:18:05 UTC 2017
On 2017.03.13 23:21:27 +0800, Yulei Zhang wrote:
> GGTT valid bit in pipe control command move to DWORD1 after SNB, so
> change the valid check code correspondingly.
>
> v2:
> per Zhenyu's comment, replace the bit check with MACRO define
> PIPE_CONTROL_GLOBAL_GTT_IVB
>
> Signed-off-by: Yulei Zhang <yulei.zhang at intel.com>
> ---
> drivers/gpu/drm/i915/gvt/cmd_parser.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> index da6bbca..dd33b8b 100644
> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> @@ -1008,7 +1008,7 @@ static int cmd_handler_pipe_control(struct parser_exec_state *s)
> ret = cmd_reg_handler(s, 0x2358, 1, "pipe_ctrl");
> else if (post_sync == 1) {
> /* check ggtt*/
> - if ((cmd_val(s, 2) & (1 << 2))) {
> + if ((cmd_val(s, 1) & PIPE_CONTROL_GLOBAL_GTT_IVB)) {
> gma = cmd_val(s, 2) & GENMASK(31, 3);
> if (gmadr_bytes == 8)
> gma |= (cmd_gma_hi(s, 3)) << 32;
> --
Applied to gvt-fixes. Thanks!
--
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