[PATCH 1/5] drm/i915/gvt: Add KBL platform definition.

[Han, Xu]

Gvt has its platform definition rule. We only need extend new platform and follow the rule.

> -----Original Message-----
> From: Wang, Hongbo
> Sent: Thursday, March 16, 2017 9:59 AM
> To: Han, Xu <xu.han at intel.com>
> Cc: Han, Xu <xu.han at intel.com>; intel-gvt-dev at lists.freedesktop.org
> Subject: RE: [PATCH 1/5] drm/i915/gvt: Add KBL platform definition.
> 
> Can we leverage i915 driver's definition? Or the new define is used by vGT only so
> we have to create new KBL macro?
> 
> 
> Best regards.
> Hongbo
> Tel: +86-21-6116 7445
> MP: +86-1364 1793 689
> Mail: hongbo.wang at intel.com
> 
> > -----Original Message-----
> > From: intel-gvt-dev
> > [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On Behalf Of Xu
> > Han
> > Sent: Thursday, March 16, 2017 9:31 AM
> > To: intel-gvt-dev at lists.freedesktop.org
> > Cc: Han, Xu <xu.han at intel.com>
> > Subject: [PATCH 1/5] drm/i915/gvt: Add KBL platform definition.
> >
> > Add KBL platform definition.
> >
> > Signed-off-by: Xu Han <xu.han at intel.com>
> > ---
> >  drivers/gpu/drm/i915/gvt/mmio.h | 19 ++++++++++---------
> >  1 file changed, 10 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gvt/mmio.h
> > b/drivers/gpu/drm/i915/gvt/mmio.h index a3a0270..7edd66f 100644
> > --- a/drivers/gpu/drm/i915/gvt/mmio.h
> > +++ b/drivers/gpu/drm/i915/gvt/mmio.h
> > @@ -44,20 +44,21 @@
> >  #define D_HSW   (1 << 2)
> >  #define D_BDW   (1 << 3)
> >  #define D_SKL	(1 << 4)
> > +#define D_KBL	(1 << 5)
> >
> > -#define D_GEN9PLUS	(D_SKL)
> > -#define D_GEN8PLUS	(D_BDW | D_SKL)
> > -#define D_GEN75PLUS	(D_HSW | D_BDW | D_SKL)
> > -#define D_GEN7PLUS	(D_IVB | D_HSW | D_BDW | D_SKL)
> > +#define D_GEN9PLUS	(D_SKL | D_KBL)
> > +#define D_GEN8PLUS	(D_BDW | D_SKL | D_KBL)
> > +#define D_GEN75PLUS	(D_HSW | D_BDW | D_SKL | D_KBL)
> > +#define D_GEN7PLUS	(D_IVB | D_HSW | D_BDW | D_SKL | D_KBL)
> >
> > -#define D_SKL_PLUS	(D_SKL)
> > -#define D_BDW_PLUS	(D_BDW | D_SKL)
> > -#define D_HSW_PLUS	(D_HSW | D_BDW | D_SKL)
> > -#define D_IVB_PLUS	(D_IVB | D_HSW | D_BDW | D_SKL)
> > +#define D_SKL_PLUS	(D_SKL | D_KBL)
> > +#define D_BDW_PLUS	(D_BDW | D_SKL | D_KBL)
> > +#define D_HSW_PLUS	(D_HSW | D_BDW | D_SKL | D_KBL)
> > +#define D_IVB_PLUS	(D_IVB | D_HSW | D_BDW | D_SKL | D_KBL)
> >
> >  #define D_PRE_BDW	(D_SNB | D_IVB | D_HSW)
> >  #define D_PRE_SKL	(D_SNB | D_IVB | D_HSW | D_BDW)
> > -#define D_ALL		(D_SNB | D_IVB | D_HSW | D_BDW | D_SKL)
> > +#define D_ALL		(D_SNB | D_IVB | D_HSW | D_BDW | D_SKL |
> > D_KBL)
> >
> >  struct intel_gvt_mmio_info {
> >  	u32 offset;
> > --
> > 1.9.1
> >
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