[PATCH] drm/i915/gvt: update guest page table even p2m faild

[Wang, Zhi A]

Hi Min:
    Even the GGTT entry is not correct, it's caused by guest itself. E.g. guest just writes part of the entry then use it, it's a fault of guest not us. For us, we try to translate the "partial" GPA when guest write the entry, if succeed, it means, the GPA is a part of guest RAM, we update the shadow GGTT, if guest use it, then it's a fault of guest. If the GPA is not a part of guest RAM we set the shadow to scratch page.

Thanks,
Zhi.

-----Original Message-----
From: intel-gvt-dev [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On Behalf Of He, Min
Sent: Thursday, March 16, 2017 11:52 AM
To: Chen, Xiaoguang <xiaoguang.chen at intel.com>; intel-gvt-dev at lists.freedesktop.org
Cc: Chen, Xiaoguang <xiaoguang.chen at intel.com>
Subject: RE: [PATCH] drm/i915/gvt: update guest page table even p2m faild

This patch may cause an incorrect value to be written to the GTT table. 
Do we have better solutions? For example, change back to the partial mode of the old vgt mode?

Thanks.

> -----Original Message-----
> From: intel-gvt-dev 
> [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On Behalf Of 
> Xiaoguang Chen
> Sent: Wednesday, March 15, 2017 7:09 PM
> To: intel-gvt-dev at lists.freedesktop.org
> Cc: Chen, Xiaoguang <xiaoguang.chen at intel.com>
> Subject: [PATCH] drm/i915/gvt: update guest page table even p2m faild
> 
> Sometimes guest driver will write the gtt mmio page table with length 
> of 4 while the entry size is 8. In this situation the p2m may failed.
> Even the p2m failed we should update the guest gtt mmio page table but 
> not update the shadow gtt mmio page table.
> 
> Signed-off-by: Xiaoguang Chen<xiaoguang.chen at intel.com>
> Reviewed-by: Zhi Wang <zhi.a.wang at intel.com>

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